PIC18CXX2_13 Datasheet, PDF (71/304 Pages) Microchip Technology – High Performance Microcontrollers with 10-bit A/D

PIC18CXX2
REGISTER 7-7:
PERIPHERAL INTERRUPT ENABLE REGISTER 2 (PIE2)
U-0
U-0
U-0
U-0
R/W-0 R/W-0
—
—
—
—
BCLIE LVDIE
bit 7
R/W-0
TMR3IE
R/W-0
CCP2IE
bit 0
bit 7-4
bit 3
bit 2
bit 1
bit 0
Unimplemented: Read as '0'
BCLIE: Bus Collision Interrupt Enable bit
1 = Enabled
0 = Disabled
LVDIE: Low Voltage Detect Interrupt Enable bit
1 = Enabled
0 = Disabled
TMR3IE: TMR3 Overflow Interrupt Enable bit
1 = Enables the TMR3 overflow interrupt
0 = Disables the TMR3 overflow interrupt
CCP2IE: CCP2 Interrupt Enable bit
1 = Enables the CCP2 interrupt
0 = Disables the CCP2 interrupt
Legend:
R = Readable bit
- n = Value at POR
W = Writable bit
’1’ = Bit is set
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared x = Bit is unknown
 1999-2013 Microchip Technology Inc.
DS39026D-page 71