PIC18CXX2_13 Datasheet, PDF (295/304 Pages) Microchip Technology – High Performance Microcontrollers with 10-bit A/D

PORTC
Associated Registers ................................................. 84
Block Diagram (Peripheral Output Override) ............. 83
Initialization .......................................................... 83, 85
PORTC Register ........................................................ 83
RC3/SCK/SCL Pin ................................................... 129
RC7/RX/DT Pin ........................................................ 151
TRISC Register .................................................. 83, 149
PORTD .............................................................................. 90
Associated Registers ................................................. 86
Block Diagram (I/O Mode) ......................................... 85
Parallel Slave Port (PSP) Function ............................ 85
PORTD Register ........................................................ 85
TRISD Register .......................................................... 85
PORTE
Analog Port Pins .................................................. 89, 90
Associated Registers ................................................. 89
Block Diagram (I/O Mode) ......................................... 87
Initialization ................................................................ 87
PORTE Register ........................................................ 87
PSP Mode Select (PSPMODE Bit) ...................... 85, 90
RE0/RD/AN5 Pin .................................................. 89, 90
RE1/WR/AN6 Pin ................................................. 89, 90
RE2/CS/AN7 Pin .................................................. 89, 90
TRISE Register .................................................... 87, 88
Postscaler, WDT
Assignment (PSA Bit) ................................................ 95
Rate Select (PS2:PS0 Bits) ....................................... 95
Switching Between Timer0 and WDT ........................ 95
Power-down Mode. See SLEEP.
Power-on Reset (POR) .............................................. 26, 179
Oscillator Start-up Timer (OST) ......................... 26, 179
Power-up Timer (PWRT) ................................... 26, 179
Time-out Sequence .................................................... 26
Time-out Sequence on Power-up ........................ 32, 33
Timing Diagram ........................................................ 248
Prescaler, Capture ........................................................... 109
Prescaler, Timer0 ............................................................... 95
Assignment (PSA Bit) ................................................ 95
Rate Select (PS2:PS0 Bits) ....................................... 95
Switching Between Timer0 and WDT ........................ 95
Prescaler, Timer1 ............................................................... 98
Prescaler, Timer2 ............................................................. 112
PRO MATE II Universal Programmer .............................. 231
Product Identification System .......................................... 301
Program Counter
PCL Register .............................................................. 39
PCLATH Register ...................................................... 39
Program Memory ............................................................... 35
Interrupt Vector .......................................................... 35
RESET Vector ............................................................ 35
Program Verification ........................................................ 186
Programming, Device Instructions ................................... 187
PSP.See Parallel Slave Port.
Pulse Width Modulation. See PWM (CCP Module).
PWM (CCP Module) ........................................................ 112
Associated Registers ............................................... 113
Block Diagram .......................................................... 112
CCPR1H:CCPR1L Registers ................................... 112
Duty Cycle ................................................................ 112
Example Frequencies/Resolutions .......................... 113
Output Diagram ........................................................ 112
Period ....................................................................... 112
Setup for PWM Operation ........................................ 113
TMR2 to PR2 Match ........................................ 101, 112
PIC18CXX2
Q
Q Clock ............................................................................ 112
R
RAM. See Data Memory.
RCALL ............................................................................. 217
RCON Register ............................................................ 53, 56
RCSTA Register
SPEN Bit .................................................................. 149
Register File ....................................................................... 42
Registers
ADCON0 (A/D Control 0) ......................................... 165
ADCON1 (A/D Control 1) ......................................... 166
CCP1CON and CCP2CON
(Capture/Compare/PWM Control) ................... 107
CONFIG1H (Configuration 1 High) .......................... 180
CONFIG1L (Configuration 1 Low) ........................... 180
CONFIG2H (Configuration 2 High) .......................... 181
CONFIG2L (Configuration 2 Low) ........................... 181
CONFIG3H (Configuration 3 High) .......................... 182
CONFIG4L (Configuration 4 Low) ........................... 182
Flag ...................................................................... 68, 69
INTCON (Interrupt Control) ....................................... 65
INTCON2 (Interrupt Control 2) .................................. 66
INTCON3 (Interrupt Control 3) .................................. 67
IPR1 (Peripheral Interrupt Priority 1) ......................... 72
IPR2 (Peripheral Interrupt Priority 2) ......................... 73
LVDCON (LVD Control) ........................................... 175
PIE2 (Peripheral Interrupt Enable 1) ......................... 70
PIE2 (Peripheral Interrupt Enable 2) ......................... 71
PIR1 (Peripheral Interrupt Request 1) ....................... 68
PIR2 (Peripheral Interrupt Request 2) ....................... 69
RCON (Register Control) ........................................... 74
RCON (RESET Control) ...................................... 53, 56
RCSTA (Receive Status and Control) ..................... 150
SSPCON1 (SSP Control 1) ..................................... 118
SSPCON2 (SSP Control 2) ..................................... 120
SSPSTAT (SSP Status) .......................................... 116
STATUS .................................................................... 52
STKPTR (Stack Pointer) ............................................ 38
Summary ................................................................... 46
T0CON (Timer0 Control) ........................................... 93
T1CON (Timer1 Control) ........................................... 97
T2CON (Timer2 Control) ......................................... 101
T3CON (Timer3 Control) ......................................... 103
TRISE ........................................................................ 88
TXSTA (Transmit Status and Control) ..................... 149
RESET ............................................................... 25, 179, 217
Timing Diagram ....................................................... 248
RETFIE ............................................................................ 218
RETLW ............................................................................ 218
RETURN .......................................................................... 219
Revision History ............................................................... 287
RLCF ............................................................................... 219
RLNCF ............................................................................. 220
RRCF ............................................................................... 220
RRNCF ............................................................................ 221
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DS39026D-page 295