PIC18CXX2_13 Datasheet, PDF (57/304 Pages) Microchip Technology – High Performance Microcontrollers with 10-bit A/D

PIC18CXX2
5.1.2 TABLAT - TABLE LATCH REGISTER
The Table Latch (TABLAT) is an 8-bit register mapped
into the SFR space. The Table Latch is used to hold
8-bit data during data transfers between program
memory and data memory.
5.1.3
TBLPTR - TABLE POINTER
REGISTER
The Table Pointer (TBLPTR) addresses a byte within
the program memory. The TBLPTR is comprised of
three SFR registers (Table Pointer Upper Byte, High
Byte and Low Byte). These three registers
(TBLPTRU:TBLPTRH:TBLPTRL) join to form a 22-bit
wide pointer. The lower 21-bits allow the device to
address up to 2 Mbytes of program memory space. The
22nd bit allows access to the Device ID, the User ID
and the Configuration bits.
The Table Pointer, TBLPTR, is used by the TBLRD and
TBLWT instructions. These instructions can update the
TBLPTR in one of four ways, based on the table operation.
These operations are shown in Table 5-1. These opera-
tions on the TBLPTR only affect the lower 21-bits.
TABLE 5-1:
Example
TBLRD*
TBLWT*
TBLRD*+
TBLWT*+
TBLRD*-
TBLWT*-
TBLRD+*
TBLWT+*
TABLE POINTER OPERATIONS WITH TBLRD AND TBLWT INSTRUCTIONS
Operation on Table Pointer
TBLPTR is not modified
TBLPTR is incremented after the read/write
TBLPTR is decremented after the read/write
TBLPTR is incremented before the read/write
5.2 Internal Program Memory Read/
Writes
5.2.1 TABLE READ OVERVIEW (TBLRD)
The TBLRD instructions are used to read data from
program memory to data memory.
TBLPTR points to a byte address in program space.
Executing TBLRD places the byte pointed to into TAB-
LAT. In addition, TBLPTR can be modified automati-
cally for the next Table Read operation.
Table Reads from program memory are performed one
byte at a time. The instruction will load TABLAT with the
one byte from program memory pointed to by TBLPTR.
5.2.2
INTERNAL PROGRAM MEMORY
WRITE BLOCK SIZE
The internal program memory of PIC18CXXX devices
is written in blocks. For PIC18CXX2 devices, the write
block size is 2 bytes. Consequently, Table Write opera-
tions to internal program memory are performed in
pairs, one byte at a time.
When a Table Write occurs to an even program mem-
ory address (TBLPTR<0> = 0), the contents of TABLAT
are transferred to an internal holding register. This is
performed as a short write and the program memory
block is not actually programmed at this time. The hold-
ing register is not accessible by the user.
When a Table Write occurs to an odd program memory
address (TBLPTR<0>=1), a long write is started. Dur-
ing the long write, the contents of TABLAT are written
to the high byte of the program memory block and the
contents of the holding register are transferred to the
low byte of the program memory block.
Figure 5-3 shows the holding register and the program
memory write blocks.
If a single byte is to be programmed, the low (even)
byte of the destination program word should be read
using TBLRD*, modified or changed, if required, and
written back to the same address using TBLWT*+. The
high (odd) byte should be read using TBLRD*, modified
or changed if required, and written back to the same
address using TBLWT. A write to the odd address will
cause a long write to begin. This process ensures that
existing data in either byte will not be changed unless
desired.
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DS39026D-page 57