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PIC18CXX2_13 Datasheet, PDF (198/304 Pages) Microchip Technology – High Performance Microcontrollers with 10-bit A/D | |||
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PIC18CXX2
BNOV
Branch if Not Overflow
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
[ label ] BNOV n
-128 ï£ n ï£ 127
if overflow bit is â0â
(PC) + 2 + 2n ï® PC
None
1110 0101 nnnn nnnn
If the Overflow bit is â0â, then the
program will branch.
The 2âs complement number â2nâ is
added to the PC. Since the PC will
have incremented to fetch the next
instruction, the new address will be
PC+2+2n. This instruction is then
a two-cycle instruction.
1
Cycles:
1(2)
Q Cycle Activity:
If Jump:
Q1
Q2
Decode
Read literal
'n'
No
operation
No
operation
If No Jump:
Q1
Q2
Decode
Read literal
'n'
Q3
Process
Data
No
operation
Q3
Process
Data
Q4
Write to PC
No
operation
Q4
No
operation
Example:
HERE
Before Instruction
PC
=
After Instruction
If Overflow =
PC
=
If Overflow ï½
PC
=
BNOV Jump
address (HERE)
0;
address (Jump)
1;
address (HERE+2)
BNZ
Branch if Not Zero
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
[ label ] BNZ n
-128 ï£ n ï£ 127
if zero bit is â0â
(PC) + 2 + 2n ï® PC
None
1110 0001 nnnn nnnn
If the Zero bit is â0â, then the pro-
gram will branch.
The 2âs complement number â2nâ is
added to the PC. Since the PC will
have incremented to fetch the next
instruction, the new address will be
PC+2+2n. This instruction is then
a two-cycle instruction.
1
Cycles:
1(2)
Q Cycle Activity:
If Jump:
Q1
Q2
Decode
Read literal
'n'
No
operation
No
operation
If No Jump:
Q1
Q2
Decode
Read literal
'n'
Q3
Process
Data
No
operation
Q3
Process
Data
Q4
Write to PC
No
operation
Q4
No
operation
Example:
HERE
Before Instruction
PC
=
After Instruction
If Zero =
PC
=
If Zero ï½
PC
=
BNZ Jump
address (HERE)
0;
address (Jump)
1;
address (HERE+2)
DS39026D-page 198
ï£ 1999-2013 Microchip Technology Inc.
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