PIC18CXX2_13 Datasheet, PDF (223/304 Pages) Microchip Technology – High Performance Microcontrollers with 10-bit A/D

PIC18CXX2
SUBLW
Subtract WREG from literal
Syntax:
[ label ] _{SUBLW k}
Operands:
0 k 255
Operation:
k – (WREG) WREG
Status Affected: N,OV, C, DC, Z
Encoding:
0000 1000 kkkk kkkk
Description:
WREG is subtracted from the
eight-bit literal 'k'. The result is
placed in WREG.
Words:
1
Cycles:
1
Q Cycle Activity:
Q1
Q2
Q3
Q4
Decode
Read
literal 'k'
Process
Data
Write to
WREG
Example 1:
SUBLW
Before Instruction
WREG = 1
C
=?
After Instruction
WREG
C
Z
N
=1
=1
=0
=0
0x02
; result is positive
Example 2:
SUBLW 0x02
Before Instruction
WREG = 2
C
=?
After Instruction
WREG
C
Z
N
=0
=1
=1
=0
; result is zero
Example 3:
SUBLW 0x02
Before Instruction
WREG = 3
C
=?
After Instruction
WREG
C
Z
N
= FF
=0
=0
=1
; (2’s complement)
; result is negative
 1999-2013 Microchip Technology Inc.
SUBWF
Subtract WREG from f
Syntax:
[ label ] _{SUBWF f [,d [,a]}
Operands:
0 f 255
d  [0,1]
a  [0,1]
Operation:
(f) – (WREG) dest
Status Affected: N,OV, C, DC, Z
Encoding:
0101 11da ffff ffff
Description:
Subtract WREG from register 'f'
(2’s complement method). If 'd' is
0, the result is stored in WREG. If
'd' is 1, the result is stored back in
register 'f' (default). If ’a’ is 0, the
Access Bank will be selected,
overriding the BSR value. If ’a’ is
1, then the bank will be selected
as per the BSR value (default).
Words:
1
Cycles:
1
Q Cycle Activity:
Q1
Q2
Decode
Read
register 'f'
Q3
Process
Data
Q4
Write to
destination
Example 1:
SUBWF
Before Instruction
REG
=3
WREG = 2
C
=?
After Instruction
REG
=1
WREG = 2
C
=1
Z
=0
N
=0
Example 2:
SUBWF
Before Instruction
REG
=2
WREG = 2
C
=?
After Instruction
REG
=2
WREG = 0
C
=1
Z
=1
N
=0
Example 3:
SUBWF
Before Instruction
REG
=1
WREG = 2
C
=?
After Instruction
REG
= FFh
WREG = 2
C
=0
Z
=0
N
=1
REG, 1, 0
; result is positive
REG, 0, 0
; result is zero
REG, 1, 0
;(2’s complement)
; result is negative
DS39026D-page 223