PIC18CXX2_13 Datasheet, PDF (127/304 Pages) Microchip Technology – High Performance Microcontrollers with 10-bit A/D

PIC18CXX2
14.3.7 SLEEP OPERATION
In Master mode, all module clocks are halted, and the
transmission/reception will remain in that state until the
device wakes from SLEEP. After the device returns to
normal mode, the module will continue to transmit/
receive data.
In Slave mode, the SPI transmit/receive shift register
operates asynchronously to the device. This allows the
device to be placed in SLEEP mode, and data to be
shifted into the SPI transmit/receive shift register.
When all 8-bits have been received, the MSSP inter-
rupt flag bit will be set and if enabled, will wake the
device from SLEEP.
14.3.8 EFFECTS OF A RESET
A RESET disables the MSSP module and terminates
the current transfer.
14.3.9 BUS MODE COMPATIBILITY
Table 14-1 shows the compatibility between the stan-
dard SPI modes and the states of the CKP and CKE
control bits.
TABLE 14-1: SPI BUS MODES
Standard SPI Mode
Terminology
Control Bits State
CKP
CKE
0, 0
0, 1
1, 0
1, 1
0
1
0
0
1
1
1
0
There is also a SMP bit which controls when the data is
sampled.
TABLE 14-2: REGISTERS ASSOCIATED WITH SPI OPERATION
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on
POR,
BOR
Value on
all other
RESETS
INTCON
PIR1
PIE1
IPR1
TRISC
SSPBUF
SSPCON
TRISA
GIE/GIEH
PSPIF ⁽¹⁾
PSPIE ⁽¹⁾
PSPIP ⁽¹⁾
PEIE/
GIEL
ADIF
ADIE
ADIP
TMR0IE INT0IE
RCIF
RCIE
RCIP
TXIF
TXIE
TXIP
RBIE
SSPIF
SSPIE
SSPIP
TMR0IF
CCP1IF
CCP1IE
CCP1IP
PORTC Data Direction Register
Synchronous Serial Port Receive Buffer/Transmit Register
WCOL SSPOV SSPEN CKP SSPM3 SSPM2
—
PORTA Data Direction Register
INT0IF RBIF 0000 000x 0000 000u
TMR2IF
TMR2IE
TMR2IP
SSPM1
TMR1IF
TMR1IE
TMR1IP
SSPM0
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
1111 1111 1111 1111
xxxx xxxx uuuu uuuu
0000 0000 0000 0000
--11 1111 --11 1111
SSPSTAT
SMP
CKE
D/A
P
S
R/W
UA
BF 0000 0000 0000 0000
Legend: x = unknown, u = unchanged, - = unimplemented, read as '0'. Shaded cells are not used by the MSSP in SPI mode.
Note 1: The PSPIF, PSPIE and PSPIP bits are reserved on the PIC18C2X2 devices. Always maintain these bits clear.
 1999-2013 Microchip Technology Inc.
DS39026D-page 127