PIC18CXX2_13 Datasheet, PDF (227/304 Pages) Microchip Technology – High Performance Microcontrollers with 10-bit A/D

PIC18CXX2
TSTFSZ
Test f, skip if 0
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
[ label ] TSTFSZ f [,a]
0  f  255
a  [0,1]
skip if f = 0
None
0110 011a ffff ffff
If 'f' = 0, the next instruction,
fetched during the current instruc-
tion execution, is discarded and a
NOP is executed, making this a two-
cycle instruction. If ’a’ is 0, the
Access Bank will be selected, over-
riding the BSR value. If ’a’ is 1,
then the bank will be selected as
per the BSR value (default).
Words:
1
Cycles:
1(2)
Note: 3 cycles if skip and followed
by a 2-word instruction.
Q Cycle Activity:
Q1
Q2
Q3
Decode
Read
register 'f'
Process
Data
If skip:
Q1
Q2
Q3
No
operation
No
operation
No
operation
If skip and followed by 2-word instruction:
Q1
Q2
Q3
No
operation
No
operation
No
operation
No
operation
No
operation
No
operation
Q4
No
operation
Q4
No
operation
Q4
No
operation
No
operation
Example:
HERE TSTFSZ CNT, 1
NZERO :
ZERO :
Before Instruction
PC = Address(HERE)
After Instruction
If CNT
PC
If CNT
PC
= 0x00,
= Address (ZERO)
 0x00,
= Address (NZERO)
XORLW
Exclusive OR literal with WREG
Syntax:
Operands:
Operation:
[ label ] _{XORLW k}
0 k 255
(WREG) .XOR. k WREG
Status Affected: N,Z
Encoding:
Description:
Words:
0000 1010 kkkk kkkk
The contents of WREG are
XORed with the 8-bit literal 'k'.
The result is placed in WREG.
1
Cycles:
1
Q Cycle Activity:
Q1
Decode
Q2
Read
literal 'k'
Q3
Process
Data
Q4
Write to
WREG
Example:
XORLW 0xAF
Before Instruction
WREG = 0xB5
After Instruction
WREG = 0x1A
 1999-2013 Microchip Technology Inc.
DS39026D-page 227