PIC18CXX2_13 Datasheet, PDF (206/304 Pages) Microchip Technology – High Performance Microcontrollers with 10-bit A/D

PIC18CXX2
DAW
Syntax:
Operands:
Operation:
Decimal Adjust WREG Register
[label] DAW
None
If [WREG<3:0> >9] or [DC = 1] then
(WREG<3:0>) + 6  WREG<3:0>;
else
(WREG<3:0>)  WREG<3:0>;
If [WREG<7:4> >9] or [C = 1] then
(WREG<7:4>) + 6  WREG<7:4>;
else
(WREG<7:4>)  WREG<7:4>;
Status Affected: C
Encoding:
0000 0000 0000 0111
Description:
DAW adjusts the eight-bit value in
WREG, resulting from the earlier
addition of two variables (each in
packed BCD format) and produces
a correct packed BCD result.
Words:
1
Cycles:
1
Q Cycle Activity:
Q1
Decode
Example1:
Q2
Read
register
WREG
DAW
Q3
Process
Data
Q4
Write
WREG
Before Instruction
WREG =
C
=
DC
=
After Instruction
0xA5
0
0
WREG
C
DC
Example 2:
= 0x05
=1
=0
Before Instruction
WREG =
C
=
DC
=
After Instruction
0xCE
0
0
WREG
C
DC
= 0x34
=1
=0
DECF
Decrement f
Syntax:
Operands:
Operation:
[ label ] DECF f [,d [,a]
0  f  255
d  [0,1]
a  [0,1]
(f) – 1  dest
Status Affected:
Encoding:
Description:
C,DC,N,OV,Z
0000 01da ffff ffff
Decrement register 'f'. If 'd' is 0, the
result is stored in WREG. If 'd' is 1,
the result is stored back in register
'f' (default). If ’a’ is 0, the Access
Bank will be selected, overriding
the BSR value. If ’a’ = 1, then the
bank will be selected as per the
BSR value (default).
Words:
1
Cycles:
1
Q Cycle Activity:
Q1
Q2
Decode
Read
register 'f'
Q3
Process
Data
Q4
Write to
destination
Example:
DECF CNT,
Before Instruction
CNT
= 0x01
Z
=0
After Instruction
CNT
= 0x00
Z
=1
1, 0
DS39026D-page 206
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