PIC18CXX2_13 Datasheet, PDF (251/304 Pages) Microchip Technology – High Performance Microcontrollers with 10-bit A/D

FIGURE 21-11:
RE2/CS
PARALLEL SLAVE PORT TIMING (PIC18C4X2)
PIC18CXX2
RE0/RD
RE1/WR
65
RD7:RD0
64
Note: Refer to Figure 21-4 for load conditions.
62
63
TABLE 21-10: PARALLEL SLAVE PORT REQUIREMENTS (PIC18C4X2)
Param.
No.
Symbol
Characteristic
Min Max Units
Conditions
62
TdtV2wrH Data in valid before WR or CS
(setup time)
20 — ns
25 — ns Extended Temp. Range
63
TwrH2dtI WR or CS to data–in invalid PIC18CXXX 20 — ns
(hold time)
PIC18LCXXX 35 — ns
64
TrdL2dtV RD and CS to data–out valid
— 80 ns
— 90 ns Extended Temp. Range
65
TrdH2dtI RD or CS to data–out invalid
10 30 ns
66
TibfINH Inhibit of the IBF flag bit being cleared from
— 3TCY
WR or CS
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DS39026D-page 251