PIC18CXX2_13 Datasheet, PDF (222/304 Pages) Microchip Technology – High Performance Microcontrollers with 10-bit A/D

PIC18CXX2
SLEEP
Enter SLEEP mode
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
[ label ] SLEEP
None
00h  WDT,
0  WDT postscaler,
1  TO,
0  PD
TO, PD
0000 0000 0000 0011
The power-down status bit (PD) is
cleared. The time-out status bit
(TO) is set. Watchdog Timer and
its postscaler are cleared.
The processor is put into SLEEP
mode with the oscillator stopped.
1
1
Q Cycle Activity:
Q1
Q2
Decode
No
operation
Q3
Process
Data
Q4
Go to
sleep
Example:
SLEEP
Before Instruction
TO = ?
PD = ?
After Instruction
TO = 1 †
PD = 0
† If WDT causes wake-up, this bit is cleared.
DS39026D-page 222
SUBFWB
Subtract f from WREG with borrow
Syntax:
[ label ] SUBFWB f [,d [,a]
Operands:
0 f 255
d  [0,1]
a  [0,1]
Operation:
(WREG) – (f) – (C) dest
Status Affected: N,OV, C, DC, Z
Encoding:
0101 01da ffff ffff
Description:
Subtract register 'f' and carry flag
(borrow) from WREG (2’s comple-
ment method). If 'd' is 0, the result is
stored in WREG. If 'd' is 1, the result
is stored in register 'f' (default). If ’a’ is
0, the Access Bank will be selected,
overriding the BSR value. If ’a’ is 1,
then the bank will be selected as per
the BSR value (default).
Words:
1
Cycles:
1
Q Cycle Activity:
Q1
Q2
Decode
Read
register 'f'
Q3
Process
Data
Q4
Write to
destination
Example 1:
SUBFWB REG, 1, 0
Before Instruction
REG
=3
WREG = 2
C
=1
After Instruction
REG
= FF
WREG = 2
C
=0
Z
=0
N
=1
; result is negative
Example 2:
SUBFWB REG, 0, 0
Before Instruction
REG
=2
WREG = 5
C
=1
After Instruction
REG
=2
WREG = 3
C
=1
Z
=0
N
=0
; result is positive
Example 3:
SUBFWB REG, 1, 0
Before Instruction
REG
=1
WREG = 2
C
=0
After Instruction
REG
=0
WREG = 2
C
=1
Z
=1
N
=0
; result is zero
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