PIC18CXX2_13 Datasheet, PDF (123/304 Pages) Microchip Technology – High Performance Microcontrollers with 10-bit A/D

PIC18CXX2
14.3.3 TYPICAL CONNECTION
Figure 14-2 shows a typical connection between two
microcontrollers. The master controller (Processor 1)
initiates the data transfer by sending the SCK signal.
Data is shifted out of both shift registers on their pro-
grammed clock edge, and latched on the opposite
edge of the clock. Both processors should be pro-
grammed to same Clock Polarity (CKP), then both con-
trollers would send and receive data at the same time.
Whether the data is meaningful (or dummy data)
depends on the application software. This leads to
three scenarios for data transmission:
• Master sends data—Slave sends dummy data
• Master sends data—Slave sends data
• Master sends dummy data—Slave sends data
FIGURE 14-2:
SPI MASTER/SLAVE CONNECTION
SPI Master SSPM3:SSPM0 = 00xxb
SDO
Serial Input Buffer
(SSPBUF)
SPI Slave SSPM3:SSPM0 = 010xb
SDI
Serial Input Buffer
(SSPBUF)
Shift Register
(SSPSR)
MSb
LSb
PROCESSOR 1
SDI
Serial Clock
SCK
SDO
Shift Register
(SSPSR)
MSb
LSb
SCK
PROCESSOR 2
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DS39026D-page 123