MC68HC908JW32_09 Datasheet, PDF (33/232 Pages) Freescale Semiconductor, Inc – M68HC08 Microcontrollers

Addr.
Register Name
Bit 7
6
5
4
3
2
Read: IF6
IF5
IF4
IF3
IF2
IF1
$FE04
Interrupt Status Register 1
(INT1)
Write:
R
R
R
R
R
R
Reset: 0
0
0
0
0
0
Read: IF14
IF13
IF12
IF11
IF10
IF9
$FE05
Interrupt Status Register 2
(INT2)
Write:
R
R
R
R
R
R
Reset: 0
0
0
0
0
0
Read: 0
0
0
0
0
0
$FE06
Interrupt Status Register 3
(INT3)
Write:
R
R
R
R
R
R
0
0
0
0
0
0
$FE07
Read:
R
R
R
R
R
R
Reserved Write:
Monitor ROM
1
Bit 0
0
0
R
R
0
0
IF8
IF7
R
R
0
0
0
IF15
R
R
0
0
R
R
$FE08
$FE09
$FE0A
Read:
FLASH Control Register
(FLCR)
Write:
Reset:
Read:
FLASH Block Protect
Register (FLBPR)
Write:
Reset:
Read:
Reserved Write:
0
0
BPR7
0
R
0
0
BPR6
0
R
0
0
BPR5
0
R
0
0
BPR4
0
R
HVEN
0
BPR3
0
R
MASS
0
BPR2
0
R
ERASE
0
BPR1
0
R
PGM
0
BPR0
0
R
$FE0B
Read:
R
R
R
R
R
R
R
R
Reserved Write:
$FE0C
Read:
Break Address High
Register (BRKH)
Write:
Bit15
Bit14
Bit13
Bit12
Bit11
Bit10
Bit9
Bit8
Reset: 0
0
0
0
0
0
0
0
$FE0D
Read:
Break Address low
Register (BRKL)
Write:
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
Reset: 0
0
0
0
0
0
0
0
Read:
0
0
0
0
0
0
$FE0E
Break Status and Control
Register (BRKSCR)
Write:
BRKE
BRKA
Reset: 0
0
0
0
0
0
0
0
Read: LVIOUT
0
0
0
0
0
0
0
$FE0F
LVI Sttatusl Register
(LVISR)
Write:
Reset: 0
0
0
0
0
0
0
0
$FFFF
Read:
COP Control Register
(COPCTL)
Write:
Reset:
Low byte of reset vector
Writing clears COP counter (any value)
Unaffected by reset
= Unimplemented
R = Reserved
U = Unaffected by reset
Figure 2-2. Control, Status, and Data Registers (Sheet 7 of 7)
MC68HC908JW32 Data Sheet, Rev. 6
Freescale Semiconductor
33