MC68HC908JW32_09 Datasheet, PDF (186/232 Pages) Freescale Semiconductor, Inc – M68HC08 Microcontrollers

External Interrupt (IRQ)
When set, the IMASK bit in the ISCR mask all external interrupt requests. A latched interrupt request is
not presented to the interrupt priority logic unless the IMASK bit is clear.
NOTE
The interrupt mask (I) in the condition code register (CCR) masks all
interrupt requests, including external interrupt requests. (See 6.5 Exception
Control.)
ACK
RESET
VECTOR
FETCH
DECODER
V_DD
IRQPD
IRQ
INTERNAL
PULLUP
DEVICE
HIGH
VOLTAGE
DETECT
"1"
D ^CLR Q
CK
IRQ
FF
SYNCHRO-
NIZER
IMASK
TO MODE
SELECT
LOGIC
TO CPU FOR
BIL/BIH
INSTRUCTIONS
IRQF
IRQ
INTERRUPT
REQUEST
TO PTE3 PULLUP
ENABLE CIRCUITRY
PTE3
PTE3IE
MODE
"1"
READ IOCR
D ^CLR Q
CK
PTE3IF
Figure 14-1. IRQ Module Block Diagram
MC68HC908JW32 Data Sheet, Rev. 6
186
Freescale Semiconductor