MC68HC908JW32_09 Datasheet, PDF (163/232 Pages) Freescale Semiconductor, Inc – M68HC08 Microcontrollers

Chapter 12
PS2 Clock Generator (PS2CLK)
12.1 Introduction
This module provides the capability to generate PS2 clock.
12.2 Functional Description
Figure 12-1 shows the block diagram for the PS2 clock generator. The module is enabled by setting
PS2EN bit. When the module is enabled, the output port becomes an open-drain output. A two phase
clock is created by the prescaler block, one is driving the clock generator unit and the other is driving the
interrupt generator. The clock generator drives the output port directly if CLKEN bit is set, while the
interrupt generator enables CPU interrupt at the different clock phase. The CPU interrupt can be masked
by clearing the PS2IEN bit. The waveform diagram is shown in Figure 12-2.
When the module is enabled, the output port status is continuous monitored and stored in PSTATUS flag.
PTE2/PS2CLK/D+
PSTATUS
CLKEN
CLOCK
GENERATOR
PS2IEN
PS2IF
INTERRUPT
GENERATOR
CPU
Interrupt
PS2EN
PRE
PRESCALER
Bus Clock
CSEL[1:0]
Figure 12-1. PS2 Clock Generator Block Diagram
MC68HC908JW32 Data Sheet, Rev. 6
Freescale Semiconductor
163