MC68HC908JW32_09 Datasheet, PDF (124/232 Pages) Freescale Semiconductor, Inc – M68HC08 Microcontrollers

Timebase Module (TBM)
TBON
÷2 ÷2 ÷2 ÷2 ÷2 ÷2 ÷2 ÷2 ÷2 ÷2 ÷2 ÷2 ÷2 ÷2 ÷2
÷ 2048 ÷ 4096 ÷ 8192 ÷ 16384 ÷ 32768
88-kHz
Internal
RC OSC
÷2 ÷2 ÷2
÷ 65536 ÷ 131072 ÷ 262144
000
001
010
011
SEL
100
101
110
111
TBMINT
TBIF
TBIE
R
Figure 9-1. Timebase Block Diagram
9.4 Timebase Register Description
The timebase has one register, the TBCR, which is used to enable the timebase interrupts and set the
rate.
Address: $0018
Bit 7
6
5
4
3
2
1
Bit 0
Read: TBIF
0
TBR2
TBR1
TBR0
TBIE
TBON
R
Write:
TACK
Reset: 0
0
0
0
0
0
0
0
= Unimplemented
R
= Reserved
Figure 9-2. Timebase Control Register (TBCR)
TBIF — Timebase Interrupt Flag
This read-only flag bit is set when the timebase counter has rolled over.
1 = Timebase interrupt pending
0 = Timebase interrupt not pending
MC68HC908JW32 Data Sheet, Rev. 6
124
Freescale Semiconductor