MC68HC908JW32_09 Datasheet, PDF (123/232 Pages) Freescale Semiconductor, Inc – M68HC08 Microcontrollers

Chapter 9
Timebase Module (TBM)
9.1 Introduction
This section describes the timebase module (TBM). The TBM will generate periodic interrupts at user
selectable rates using a counter clocked by the selected OSCCLK clock from the oscillator module. This
TBM version uses 18 divider stages, eight of which are user selectable.
9.2 Features
Features of the TBM module include:
• 88-kHz build-in RC clock.
• Software programmable ~3s, ~1.5s, ~745ms, ~372ms, ~186ms, ~93ms, ~47ms, and ~23ms
periodic interrupt
• User selectable oscillator clock source enable during stop mode to allow periodic wake-up from
stop
9.3 Functional Description
This module can generate a periodic interrupt by dividing the oscillator clock frequency, OSCCLK. The
counter is initialized to all 0s when TBON bit is cleared. The counter, shown in Figure 9-1, starts counting
when the TBON bit is set. When the counter overflows at the tap selected by TBR2:TBR0, the TBIF bit
gets set. If the TBIE bit is set, an interrupt request is sent to the CPU. The TBIF flag is cleared by writing
a 1 to the TACK bit. The first time the TBIF flag is set after enabling the timebase module, the interrupt is
generated at approximately half of the overflow period. Subsequent events occur at the exact period.
MC68HC908JW32 Data Sheet, Rev. 6
Freescale Semiconductor
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