MC68HC908JW32_09 Datasheet, PDF (205/232 Pages) Freescale Semiconductor, Inc – M68HC08 Microcontrollers

Chapter 18
Break Module (BRK)
18.1 Introduction
This section describes the break module. The break module can generate a break interrupt that stops
normal program flow at a defined address to enter a background program.
18.2 Features
Features of the break module include:
• Accessible input/output (I/O) registers during the break interrupt
• CPU-generated break interrupts
• Software-generated break interrupts
• COP disabling during break interrupts
Addr.
Register Name
$FE00
Read:
SIM Break Status Register
(SBSR)
Write:
Reset:
$FE03
SIM Break Flag Control ^Read:
Register Write:
(SBFCR) _Reset:
$FE0C
Break Address ^Read:
Register High Write:
(BRKH) _Reset:
$FE0D
Break Address ^Read:
Register Low Write:
(BRKL) _Reset:
$FE0E
Break Status and Control ^Read:
Register Write:
(BRKSCR) _Reset:
Note: Writing a logic 0 clears BW.
Bit 7
R
BCFE
0
Bit 15
0
Bit 7
0
BRKE
0
6
5
R
R
R
R
14
13
0
0
6
5
0
0
0
BRKA
0
0
= Unimplemented
4
3
2
R
R
R
R
R
R
12
11
10
0
0
0
4
3
2
0
0
0
0
0
0
0
0
0
R = Reserved
Figure 18-1. Break Module I/O Register Summary
1
Bit 0
SBSW
R
Note
0
R
R
9
Bit 8
0
0
1
Bit 0
0
0
0
0
0
0
MC68HC908JW32 Data Sheet, Rev. 6
Freescale Semiconductor
205