|
MC68HC908JW32_09 Datasheet, PDF (25/232 Pages) Freescale Semiconductor, Inc – M68HC08 Microcontrollers | |||
|
◁ |
Chapter 2
Memory
2.1 Introduction
The CPU08 can address 64 Kbytes of memory space. The memory map, shown in Figure 2-1, includes:
⢠32,768 bytes of user FLASH
⢠1,024 bytes of RAM
⢠64 bytes of USB buffer RAM
⢠48 bytes of user-defined vectors
⢠1,472 bytes of monitor ROM
2.2 Input/Output I/O Section
Addresses $0000â$005F, shown in Figure 2-2, contain most of the control, status, and data registers.
Additional I/O registers have these addresses:
⢠$1090; PLL control registers, PTCL
⢠$1091; PLL bandwidth control register, PBWC
⢠$1092; PLL multiplier select register high, PMSH
⢠$1093; PLL multiplier select register low, PMSL
⢠$1094; PLL VCO range select register, PMRS
⢠$1095; PLL Reference divider select register, PMDS
⢠$FE00; Break status register, BSR
⢠$FE01; Reset status register, RSR
⢠$FE02; Reserved
⢠$FE03; Break flag control register, BFCR
⢠$FE04; Interrupt status register 1, INT1
⢠$FE05; Interrupt status register 2, INT2
⢠$FE06; Interrupt status register 2, INT3
⢠$FE07; Reserved
⢠$FE08; FLASH control register, FLCR
⢠$FE09; FLASH block protect register, FLBPR
⢠$FE0A; Reserved
⢠$FE0B; Reserved
⢠$FE0C; Break Address Register High, BRKH
⢠$FE0D; Break Address Register Low, BRKL
⢠$FE0E; Break status and control register, BRKSCR
⢠$FFFF; COP control register, COPCTL
2.3 Monitor ROM
The 1024 bytes at addresses $FA00â$FDFF and 448 bytes at addresses $FE10â$FFCF are reserved
ROM addresses that contain the instructions for the monitor functions. (See Chapter 7 Monitor Mode
(MON).)
MC68HC908JW32 Data Sheet, Rev. 6
Freescale Semiconductor
25
|
▷ |