MC68HC908JW32_09 Datasheet, PDF (164/232 Pages) Freescale Semiconductor, Inc – M68HC08 Microcontrollers

PS2 Clock Generator (PS2CLK)
CLKEN = 1
CLKEN = 0
CLK
Output
Interrupt
Generator
CPU
Interrupt
Trigger
Figure 12-2. Clock Generator Output Waveform.
12.3 PS2 Clock Generator Control and Status Registers
Address: $0019
Bit 7
6
5
4
3
2
1
Bit 0
Read: PSTATUS
PS2IF
PRE
CSEL1 CSEL0 PS2IEN CLKEN PS2EN
Write:
Reset: 0
0
0
0
0
0
0
0
= Unimplemented
R
= Reserved
Figure 12-3. PS2 Clock Generator Control and Status Registers (PS2CSR)
PSTATUS — Port Status Flag
This read only bit reflects the port status when the module is enabled. Reset clears this bit.
1 = Port status is logic high
0 = Port status is logic low
PS2IF — PS2 Interrupt Flag.
This flag is set when PS2 interrupt is trigger by the interrupt generator. Writing one to this bit clears the
flag. Reset clears this flag.
1 = CPU interrupt is pending
0 = CPU interrupt is not pending
MC68HC908JW32 Data Sheet, Rev. 6
164
Freescale Semiconductor