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MC68HC908JW32_09 Datasheet, PDF (167/232 Pages) Freescale Semiconductor, Inc – M68HC08 Microcontrollers
Chapter 13
Input/Output (I/O) Ports
13.1 Introduction
Twenty-nine (34) bidirectional input-output (I/O) pins form five parallel ports. All I/O pins are
programmable as inputs or outputs.
Input pins and I/O port pins that are not used in the application must be terminated. This prevents excess
current caused by floating inputs, and enhances immunity during noise or transient events. Termination
methods include:
1. Configuring unused pins as outputs and driving high or low;
2. Configuring unused pins as inputs and enabling internal pull-ups;
3. Configuring unused pins as inputs and using external pull-up or pull-down resistors.
Never connect unused pins directly to VDD or VSS.
Since some general-purpose I/O pins are not available on all packages, these pins must be terminated
as well. Either method 1 or 2 above are appropriate.
Addr.
$0000
$0001
$0002
$0003
$0008
$0004
Register Name
Read:
Port A Data Register
(PTA)
Write:
Reset:
Read:
Port B Data Register
(PTB)
Write:
Reset:
Read:
Port C Data Register
(PTC)
Write:
Reset:
Read:
Port D Data Register
(PTD)
Write:
Reset:
Read:
Port E Data Register
(PTE)
Write:
Reset:
Read:
Data Direction Register A
(DDRA)
Write:
Reset:
Bit 7
PTA7
PTB7
PTD7
PTE7
DDRA7
0
6
PTA6
5
PTA5
PTB6
PTB5
PTD6
PTD5
PTE6
PTE5
DDRA6 DDRA5
0
0
= Unimplemented
4
3
PTA4
PTA3
Unaffected by reset
PTB4
PTB3
Unaffected by reset
PTC3
Unaffected by reset
PTD4
PTD3
Unaffected by reset
PTE4
PTE3
Unaffected by reset
DDRA4 DDRA3
0
0
2
PTA2
PTB2
PTC2
PTD2
PTE2
DDRA2
0
1
PTA1
PTB1
PTC1
PTD1
DDRA1
0
Bit 0
PTA0
PTB0
PTC0
PTD0
DDRA0
0
Figure 13-1. I/O Port Register Summary
MC68HC908JW32 Data Sheet, Rev. 6
Freescale Semiconductor
167