MC68HC908JW32_09 Datasheet, PDF (176/232 Pages) Freescale Semiconductor, Inc – M68HC08 Microcontrollers

Input/Output (I/O) Ports
13.5 Port D
Port D is a 8-bit general-purpose bidirectional I/O port.
13.5.1 Port D Data Register
The port D data register contains a data latch for each of the eight port D pins.
Address:
Read:
Write:
Reset:
Additional Function:
$0003
Bit 7
PTD7
Optional
Pullup
6
PTD6
5
PTD5
4
3
2
PTD4
PTD3
PTD2
Unaffected by reset
Optional
Pullup
Optional
Pullup
1
PTD1
Bit 0
PTD0
= Unimplemented
Figure 13-11. Port D Data Register (PTD)
PTD[7:0] — Port D Data Bits
These read/write bits are software programmable. Data direction of each port D pin is under control of
the corresponding bit in data direction register D. Reset has no effect on port D data.
PTD2, PTD3 and PTD7
There is programmable pullup associated with the pins. The pullup are default enabled and can be
controlled via POCR2 register.
13.5.2 Data Direction Register D
Data direction register D determines whether each port D pin is an input or an output. Writing a logic 1 to
a DDRD bit enables the output buffer for the corresponding port D pin; a logic 0 disables the output buffer.
Address:
Read:
Write:
Reset:
$0007
Bit 7
6
5
4
3
2
1
DDRD7 DDRD6 DDRD5 DDRD4 DDRD3 DDRD2 DDRD1
0
0
0
0
0
0
0
Figure 13-12. Data Direction Register D (DDRD)
Bit 0
DDRD0
0
DDRD[7:0] — Data Direction Register D Bits
These read/write bits control port D data direction. Reset clears DDRD[7:0], configuring all port D pins
as inputs.
1 = Corresponding port D pin configured as output
0 = Corresponding port D pin configured as input
NOTE
Avoid glitches on port D pins by writing to the port D data register before
changing data direction register D bits from 0 to 1.
MC68HC908JW32 Data Sheet, Rev. 6
176
Freescale Semiconductor