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MC68HC908JW32_09 Datasheet, PDF (198/232 Pages) Freescale Semiconductor, Inc – M68HC08 Microcontrollers
Computer Operating Properly (COP)
The COP counter is a free-running 6-bit counter preceded by a 12-bit system integration module (SIM)
counter. If not cleared by software, the COP counter overflows and generates an asynchronous reset
after 262,128 or 8176 CGMRCLK cycles, depending on the state of the COP rate select bit, COPRS in
the configuration register. With a 262,128 CGMRCLK cycle overflow option (COPRS = 0), a 4-MHz
external clock source gives a COP timeout period of 66ms. Writing any value to location $FFFF before
an overflow occurs prevents a COP reset by clearing the COP counter and stages 12 through 5 of the
SIM counter.
NOTE
Service the COP immediately after reset and before entering or after exiting
stop mode to guarantee the maximum time before the first COP counter
overflow.
A COP reset pulls the RST pin low for 32 CGMRCLK cycles and sets the COP bit in the reset status
register (RSR).
In monitor mode, the COP is disabled if the RST pin or the IRQ is held at VTST. During the break state,
VTST on the RST pin disables the COP.
NOTE
Place COP clearing instructions in the main program and not in an interrupt
subroutine. Such an interrupt subroutine could keep the COP from
generating a reset even while the main program is not working properly.
16.3 I/O Signals
The following paragraphs describe the signals shown in Figure 16-1.
16.3.1 CGMRCLK
CGMRCLK is the reference clock output from the OSC module. If a 4-MHz crystal is used, CGMRCLK is
also 4-MHz.
16.3.2 STOP Instruction
The STOP instruction clears the COP prescaler.
16.3.3 COPCTL Write
Writing any value to the COP control register (COPCTL) (see 16.4 COP Control Register) clears the COP
counter and clears bits 12 through 5 of the SIM counter. Reading the COP control register returns the low
byte of the reset vector.
16.3.4 Power-On Reset
The power-on reset (POR) circuit in the SIM clears the COP prescaler 4096 CGMRCLK cycles after
power-up.
16.3.5 Internal Reset
An internal reset clears the SIM counter and the COP counter.
MC68HC908JW32 Data Sheet, Rev. 6
198
Freescale Semiconductor