MC68HC908JW32_09 Datasheet, PDF (189/232 Pages) Freescale Semiconductor, Inc – M68HC08 Microcontrollers

IRQ Option Control Register
ACK — IRQ Interrupt Request Acknowledge Bit
Writing a logic 1 to this write-only bit clears the IRQ latch. ACK always reads as logic 0. Reset clears
ACK.
IMASK — IRQ Interrupt Mask Bit
Writing a logic 1 to this read/write bit disables IRQ interrupt requests. Reset clears IMASK.
1 = IRQ interrupt requests disabled
0 = IRQ interrupt requests enabled
MODE — IRQ Edge/Level Select Bit
This read/write bit controls the triggering sensitivity of the IRQ pin. Reset clears MODE.
1 = IRQ interrupt requests on falling edges and low levels
0 = IRQ interrupt requests on falling edges only
14.8 IRQ Option Control Register
The IRQ option control register controls and monitors the external interrupt function available on the PTE3
pin. It also disables/enables the pullup resistor on the IRQ pin.
• Controls pullup option on IRQ pin
• Enables PTE3 pin for external interrupts to IRQ
• Shows the state of the PTE3 interrupt flag
Address:
Read:
Write:
Reset:
$001C
Bit 7
6
5
4
3
2
1
0
0
0
0
0
PTE3IF
PTE3IE
0
0
0
0
0
0
0
= Unimplemented
Figure 14-4. IRQ Option Control Register (IOCR)
Bit 0
IRQPD
0
PTE3IF — PTE3 Interrupt Flag
This read-only status bit is high when a falling edge on PTE3 pin is detected. PTE3IF bit clears when
the IOCR is read.
1 = falling edge on PTE3 is detected and PTE3IE is set
0 = falling edge on PTE3 is not detected or PTE3IE is clear
PTE3IE — PTE3 Interrupt Enable
This read/write bit enables or disables the interrupt function on the PTE3 pin to trigger the IRQ
interrupt. Setting the PTE3IE bit and clearing the USBEN bit in the USB address register configure the
PTE3 pin for interrupt function to the IRQ interrupt. Setting PTE3IE also enables the internal pullup on
PTE3 pin.
1 = PTE3 interrupt enabled; triggers IRQ interrupt
0 = PTE3 interrupt disabled
IRQPD — IRQ Pullup Disable
This read/write bit controls the pullup option for the IRQ pin.
1 = Internal pullup is disconnected
0 = Internal pull-up is connected between IRQ pin and V_DD
MC68HC908JW32 Data Sheet, Rev. 6
Freescale Semiconductor
189