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EP3C5E144C8N Datasheet, PDF (345/348 Pages) Altera Corporation – Ability to disable external JTAG port | |||
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Chapter 2: Cyclone III LS Device Data Sheet
Glossary
2â31
Table 2â39. Glossary (Part 6 of 6)
Letter
Term
VCM(DC)
VDIF(AC)
VDIF(DC)
VICM
VID
VIH
VIH(AC)
VIH(DC)
VIL
VIL (AC)
VIL (DC)
VIN
VOCM
V
VOD
VOH
VOL
VOS
VOX (AC)
VREF
VREF (AC)
VREF (DC)
VSWING (AC)
VSWING (DC)
VTT
VX (AC)
W
â
X
â
Y
â
Z
â
Definitions
DC common mode input voltage.
AC differential Input VoltageâThe minimum AC input differential voltage required for
switching.
DC differential Input VoltageâThe minimum DC input differential voltage required for
switching.
Input Common Mode VoltageâThe common mode of the differential signal at the receiver.
Input differential Voltage SwingâThe difference in voltage between the positive and
complementary conductors of a differential transmission at the receiver.
Voltage Input HighâThe minimum positive voltage applied to the input that is accepted by
the device as a logic high.
High-level AC input voltage.
High-level DC input voltage.
Voltage Input LowâThe maximum positive voltage applied to the input that is accepted by
the device as a logic low.
Low-level AC input voltage.
Low-level DC input voltage.
DC input voltage.
Output Common Mode VoltageâThe common mode of the differential signal at the
transmitter.
Output differential Voltage SwingâThe difference in voltage between the positive and
complementary conductors of a differential transmission at the transmitter. VOD = VOH â VOL.
Voltage Output HighâThe maximum positive voltage from an output that the device
considers will be accepted as the minimum positive high level.
Voltage Output LowâThe maximum positive voltage from an output that the device considers
will be accepted as the maximum positive low level.
Output offset voltageâVOS = (VOH + VOL) / 2.
AC differential Output cross point voltageâThe voltage at which the differential output signals
must cross.
Reference voltage for the SSTL and HSTL I/O standards.
AC input reference voltage for the SSTL and HSTL I/O standards. VREF(AC) = VREF(DC) + noise.
The peak-to-peak AC noise on VREF must not exceed 2% of VREF(DC).
DC input reference voltage for the SSTL and HSTL I/O standards.
AC differential Input VoltageâAC Input differential voltage required for switching. Refer to
Input Waveforms for the SSTL Differential I/O Standard.
DC differential Input VoltageâDC Input differential voltage required for switching. Refer to
Input Waveforms for the SSTL Differential I/O Standard.
Termination voltage for the SSTL and HSTL I/O standards.
AC differential Input cross point VoltageâThe voltage at which the differential input signals
must cross.
â
â
â
â
December 2011 Altera Corporation
Cyclone III Device Handbook
Volume 2
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