EP3C5E144C8N Datasheet, PDF (127/348 Pages) Altera Corporation – Ability to disable external JTAG port

Chapter 7: High-Speed Differential Interfaces in the Cyclone III Device Family
7–5
High-Speed I/O Interface
Table 7–2. Cyclone III Device Family Differential Channels (Part 2 of 2)
Cyclone III Device Family
Device
Package
Number of Differential Channels ^{(1), (2)}
User I/O Clock Input
Clock
Output
Total
U484
101
8
EP3CLS70
F484
101
8
F780
169
8
U484
101
8
EP3CLS100
F484
101
8
Cyclone III LS Devices
F780
169
8
F484
75
8
EP3CLS150
F780
169
8
F484
75
8
EP3CLS200
F780
169
8
4
113
4
113
4
181
4
113
4
113
4
181
4
87
4
181
4
87
4
181
Notes to Table 7–2:
(1) User I/O pins are used as inputs or outputs; clock input pins are used as inputs only; clock output pins are used as output only.
(2) For differential pad placement guidelines, refer to the I/O Features in the Cyclone III Device Family chapter.
Table 7–3 lists the numbers of differential channels that can be migrated in
Cyclone III devices.
Table 7–3. Cyclone III Devices Migratable Differential Channels ⁽¹⁾ (Part 1 of 2)
Package
Type
E144
M164
Q240
F256
Migration Between Devices
EP3C5 and EP3C10
EP3C5 and EP3C16
EP3C5 and EP3C25
EP3C10 and EP3C16
EP3C10 and EP3C25
EP3C16 and EP3C25
EP3C5 and EP3C10
EP3C5 and EP3C16
EP3C10 and EP3C16
EP3C16 and EP3C25
EP3C16 and EP3C40
EP3C25 and EP3C40
EP3C5 and EP3C10
EP3C5 and EP3C16
EP3C5 and EP3C25
EP3C10 and EP3C16
EP3C10 and EP3C25
EP3C16 and EP3C25
Migratable Channels
User I/O
CLK
16
4
5
4
6
4
5
4
6
4
5
8
22
4
11
4
19
4
23
8
11
8
12
8
62
4
39
4
40
4
39
4
40
4
33
8
Total
20
9
10
9
10
13
26
15
14
31
19
20
66
43
44
43
44
41
December 2011 Altera Corporation
Cyclone III Device Handbook
Volume 1