EP3C5E144C8N Datasheet, PDF (329/348 Pages) Altera Corporation – Ability to disable external JTAG port

Chapter 2: Cyclone III LS Device Data Sheet
Switching Characteristics
2–15
PLL Specifications
Table 2–20 lists the PLL specifications for Cyclone III LS devices when operating in
the commercial junction temperature range (0°C to 85°C) and the industrial junction
temperature range (-40°C to 100°C). For more information about the PLL block, refer
to “PLL Block” in “Glossary” on page 2–26.
Table 2–20. Cyclone III LS Devices PLL Specifications ⁽⁴⁾ (Part 1 of 2) (Preliminary)
Symbol
Parameter
Min
f_IN ⁽¹⁾
f_INPFD
f_VCO ⁽⁶⁾
f_INDUTY
t_{INJITTER_CCJ} ⁽⁵⁾
f_{OUT_EXT} (external clock
output) ⁽¹⁾
Input clock frequency
—
PFD input frequency
5
PLL internal VCO operating range
600
Input clock duty cycle
40
Input clock cycle-to-cycle jitter for F_INPFD ≥ 100 MHz
—
Input clock cycle-to-cycle jitter for F_INPFD < 100 MHz
—
PLL output frequency
—
PLL output frequency (–7 speed grade)
426
f_OUT (to global clock)
PLL output frequency (–8 speed grade)
379
t_OUTDUTY
Duty cycle for external clock output (when set to
50%)
45
t_LOCK
Time required to lock from end of device
configuration
—
t_DLOCK
Time required to lock dynamically (after switchover,
reconfiguring any non-post-scale counters/delays or —
areset is deasserted)
t_{OUTJITTER_PERIOD_DEDCLK} ⁽³⁾
Dedicated clock output period jitter F_OUT ≥ 100 MHz
F_OUT < 100 MHz
—
—
t_{OUTJITTER_CCJ_DEDCLK} ⁽³⁾
Dedicated clock output cycle-to-cycle jitter
F_OUT ≥ 100 MHz
—
F_OUT < 100 MHz
—
t_{OUTJITTER_PERIOD_IO} ⁽³⁾
Regular I/O period jitter F_OUT ≥ 100 MHz
F_OUT < 100 MHz
—
—
t_{OUTJITTER_CCJ_IO} ⁽³⁾
Regular I/O cycle-to-cycle jitter F_OUT ≥ 100 MHz
—
F_OUT < 100 MHz
—
t_{PLL_PSERR}
Accuracy of PLL phase shift
—
t_ARESET
Minimum pulse width on areset signal.
10
t_CONFIGPLL
Time required to reconfigure scan chains for PLLs
—
Typ Max
— 450
— 325
— 1300
—
60
— 0.15
— ±750
— 450
— 450
— 402.5
50
55
—
1
—
1
— 300
— 30
— 300
— 30
— 650
— 75
— 650
— 75
— ±50
—
—
3.5 ⁽²⁾ —
Unit
MHz
MHz
MHz
%
UI
ps
MHz
MHz
MHz
%
ms
ms
ps
mUI
ps
mUI
ps
mUI
ps
mUI
ps
ns
scanclk
cycles
December 2011 Altera Corporation
Cyclone III Device Handbook
Volume 2