EP3C5E144C8N Datasheet, PDF (320/348 Pages) Altera Corporation – Ability to disable external JTAG port

2–6
Chapter 2: Cyclone III LS Device Data Sheet
Electrical Characteristics
Table 2–5. Cyclone III LS Devices Bus Hold Parameters ⁽¹⁾
V_CCIO (V)
Parameter Condition
1.2
1.5
1.8
2.5
3.0
3.3 Unit
Min Max Min Max Min Max Min Max Min Max Min Max
Bus-hold
high,
overdrive
current
0 V < V_IN <
V_CCIO
— –125 — –175 — –200 — –300 — –500 — –500 μA
Bus-hold
trip point
—
0.3 0.9 0.375 1.125 0.68 1.07 0.7 1.7 0.8 2.0 0.8 2.0 V
Note to Table 2–5:
(1) Bus-hold trip points are based on calculated input voltages from the JEDEC standard.
OCT Specifications
Table 2–6 lists the variation of OCT without calibration across process, temperature,
and voltage (PVT).
Table 2–6. Cyclone III LS Devices Series OCT without Calibration Specifications
Description
V_CCIO (V)
3.0
2.5
Series OCT without
calibration
1.8
1.5
1.2
Resistance Tolerance
Unit
Commercial Max
Industrial Max
±30
±40
%
±30
±40
%
±40
±50
%
±50
±50
%
±50
±50
%
OCT calibration is automatically performed at device power-up for OCT enabled
I/Os.
Table 2–7 lists the OCT calibration accuracy at device power-up.
Table 2–7. Cyclone III LS Devices Series OCT with Calibration at Device Power-Up Specifications
Calibration Accuracy
Description
V_CCIO (V)
Unit
Commercial Max
Industrial Max
3.0
±10
±10
%
2.5
±10
Series Termination with
power-up calibration
1.8
±10
1.5
±10
±10
%
±10
%
±10
%
1.2
±10
±10
%
OCT resistance may vary with the variation of temperature and voltage after
power-up calibration. Use Table 2–8 and Equation 2–1 to determine the final OCT
resistance considering the variations after power-up calibration.
Cyclone III Device Handbook
Volume 2
December 2011 Altera Corporation