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EP3C5E144C8N Datasheet, PDF (339/348 Pages) Altera Corporation – Ability to disable external JTAG port | |||
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Chapter 2: Cyclone III LS Device Data Sheet
Switching Characteristics
2â25
OCT Calibration Timing Specification
Table 2â36 lists the duration of calibration for series OCT with calibration at device
power-up for Cyclone III LS devices.
Table 2â36. Cyclone III LS Devices Timing Specification for Series OCT with Calibration at Device
Power-Up (1) (Preliminary)
Symbol
Description
Maximum
Unit
tOCTCAL
Duration of series OCT with
calibration at device power-up
20
µs
Note to Table 2â36:
(1) OCT calibration takes place after device configuration, before entering user mode.
IOE Programmable Delay
Table 2â37 and Table 2â38 list the IOE programmable delay for Cyclone III LS devices.
Table 2â37. Cyclone III LS Devices IOE Programmable Delay on the Column Pins (1), (2)
Parameter
Input delay from the pin to the
internal cells
Input delay from the pin to the
input register
Delay from the output register to
the output pin
Input delay from the
dual-purpose clock pin to the
fan-out destinations
Paths Affected
Pad to I/O
dataout to core
Pad to I/O input
register
I/O output
register to pad
Pad to global
clock network
Number
of
setting
7
8
2
12
Min
Offset
0
0
0
0
Max Offset
Fast Corner
Slow Corner
Unit
I7 C7 C7 C8 I7
1.211 1.314 2.339 2.416 2.397 ns
1.203 1.307 2.387 2.540 2.430 ns
0.518 0.559 1.065 1.151 1.082 ns
0.533 0.56 1.077 1.182 1.087 ns
Notes to Table 2â37:
(1) The incremental values for the settings are generally linear. For the exact values of each setting, use the latest version of the Quartus II software.
(2) The minimum and maximum offset timing numbers refer to the 0 setting available in the Quartus II software.
Table 2â38. Cyclone III LS Devices IOE Programmable Delay on Row Pins (1), (2)
Parameter
Input delay from the pin to the
internal cells
Input delay from the pin to the
input register
Delay from the output register to
the output pin
Paths Affected
Pad to I/O
dataout to core
Pad to I/O input
register
I/O output
register to pad
Number
of
setting
7
8
2
Min
Offset
0
0
0
Max Offset
Fast Corner
Slow Corner
Unit
I7 C7 C7 C8 I7
1.209 1.314 2.352 2.514 2.432 ns
1.207 1.312 2.402 2.558 2.447 ns
0.549 0.595 1.135 1.226 1.151 ns
December 2011 Altera Corporation
Cyclone III Device Handbook
Volume 2
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