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EP3C5E144C8N Datasheet, PDF (171/348 Pages) Altera Corporation – Ability to disable external JTAG port
Chapter 9: Configuration, Design Security, and Remote System Upgrades in the Cyclone III Device Family
Configuration Features
9–13
1 If you want to gain control of the EPCS pins, hold the nCONFIG pin low and pull the
nCE pin high to cause the device to reset and tri-state the AS configuration pins.
Single-Device AS Configuration
The four-pin interface of serial configuration devices consists of the following pins:
■ Serial clock input (DCLK)
■ Serial data output (DATA)
■ AS data input (ASDI)
■ Active-low chip select (nCS)
This four-pin interface connects to Cyclone III device family pins, as shown in
Figure 9–3.
Figure 9–3. Single-Device AS Configuration
VCCIO (1)
VCCIO (1)
10 kΩ
Serial Configuration
Device
VCCIO (1)
10 kΩ
10 kΩ
Cyclone III Device Family
nSTATUS
CONF_DONE
nCONFIG
nCE
nCEO
GND
N.C. (3)
DATA
DCLK
nCS
ASDI
25 Ω (6)
(2)
DATA[0]
DCLK
nCSO (5)
ASDO (5)
MSEL[3..0]
(4)
Notes to Figure 9–3:
(1) Connect the pull-up resistors to the VCCIO supply of the bank in which the pin resides.
(2) Cyclone III device family uses the ASDO-to-ASDI path to control the configuration device.
(3) The nCEO pin is left unconnected or used as a user I/O pin when it does not feed the nCE pin of another device.
(4) The MSEL pin settings vary for different configuration voltage standards and POR time. To connect MSEL[3..0],
refer to Table 9–7 on page 9–11. Connect the MSEL pins directly to VCCA or GND.
(5) These are dual-purpose I/O pins. The nCSO pin functions as the FLASH_NCE pin in AP mode. The ASDO pin functions
as the DATA[1] pin in other AP and FPP modes.
(6) Connect the series resistor at the near end of the serial configuration device.
1 To tri-state the configuration bus for AS configuration schemes, you must tie nCE high
and nCONFIG low.
1 When connecting a serial configuration device to a Cyclone III device family in the
single-device AS configuration, you must connect a 25-Ω series resistor at the near
end of the serial configuration device for DATA[0]. The 25-Ω resistor in the series
works to minimize the driver impedance mismatch with the board trace and reduce
overshoot seen at the Cyclone III device family DATA[0]input pin.
December 2011 Altera Corporation
Cyclone III Device Handbook
Volume 1