EP3C5E144C8N Datasheet, PDF (11/348 Pages) Altera Corporation – Ability to disable external JTAG port

Section I. Device Core
This section provides a complete overview of all features relating to the Cyclone^® III
device family.
This section includes the following chapters:
■ Chapter 1, Cyclone III Device Family Overview
■ Chapter 2, Logic Elements and Logic Array Blocks in the Cyclone III Device
Family
■ Chapter 3, Memory Blocks in the Cyclone III Device Family
■ Chapter 4, Embedded Multipliers in the Cyclone III Device Family
■ Chapter 5, Clock Networks and PLLs in the Cyclone III Device Family
f For information about the revision history for chapters in this section, refer to
“Document Revision History” in each individual chapter.
December 2011 Altera Corporation
Cyclone III Device Handbook
Volume 1