EP3C5E144C8N Datasheet, PDF (331/348 Pages) Altera Corporation – Ability to disable external JTAG port

Chapter 2: Cyclone III LS Device Data Sheet
Switching Characteristics
2–17
Configuration and JTAG Specifications
Table 2–23 lists the configuration mode specifications for Cyclone III LS devices.
Table 2–23. Cyclone III LS Devices Configuration Mode Specifications (Preliminary)
Programming Mode
DCLK f_MAX
Unit
Passive Serial (PS)
133
MHz
Fast Passive Parallel (FPP)
100
MHz
Table 2–24 lists the active configuration mode specifications for Cyclone III LS
devices.
Table 2–24. Cyclone III LS Devices Active Configuration Mode Specifications (Preliminary)
Programming Mode
DCLK Range
Unit
Active Serial (AS)
20 to 40
MHz
Table 2–25 lists the JTAG timing parameters and values for Cyclone III LS devices.
Table 2–25. Cyclone III LS Devices JTAG Timing Parameters ⁽¹⁾ (Preliminary)
Symbol
Parameter
Min Max Unit
t_JCP
TCK clock period
40 — ns
t_JCH
TCK clock high time
20 — ns
t_JCL
TCK clock low time
20 — ns
t_{JPSU_TDI} JTAG port setup time for TDI
2
— ns
t_{JPSU_TMS} JTAG port setup time for TMS
3
— ns
t_JPH
JTAG port hold time
10 — ns
t_JPCO
JTAG port clock to output ⁽²⁾
— 16 ns
t_JPZX
JTAG port high impedance to valid output ⁽²⁾
— 15 ns
t_JPXZ
JTAG port valid output to high impedance ⁽²⁾
— 15 ns
t_JSSU
Capture register setup time
5
— ns
t_JSH
Capture register hold time
10 — ns
t_JSCO
Update register clock to output
— 25 ns
t_JSZX
Update register high impedance to valid output
— 25 ns
t_JSXZ
Update register valid output to high impedance
— 25 ns
Notes to Table 2–25:
(1) For more information, refer to “JTAG Waveform” in “Glossary” on page 2–26.
(2) The specification shown is for the 3.3-, 3.0-, and 2.5-V LVTTL/LVCMOS operation of the JTAG pins. For the 1.8-V
LVTTL/LVCMOS and the 1.5-V LVCMOS, the JTAG port clock to output time is 16 ns.
Periphery Performance
This section describes periphery performance, including high-speed I/O, external
memory interface, and IOE programmable delay.
December 2011 Altera Corporation
Cyclone III Device Handbook
Volume 2