AK4679EG Datasheet, PDF (97/220 Pages) Asahi Kasei Microsystems – 24bit Stereo CODEC with DSP and MIC/RCV/HP/SPK/LINE-AMP

[AK4679]
Slope Setting
Y1_H
H1G =
X 1_H
x 16, H2G =
(Y2_H – Y1_H)
(X2_H – X1_H)
x 16,
H3G = ^{(Y3H – Y2H)} x 16, H4G = ^{(Y4H – Y3H)} x 16
(X3_H – X2_H)
(X4_H – X3_H)
The results calculated by the equations above should be rounded off to integer. These integers are slope data.
H1G6-0 bits, H2G6-0 bits,
H3G6-0 bits, H4G6-0 bits
Slope Data
00H
0
(default)
01H
1
02H
2
:
:
7EH
126
7FH
127
Table 61. DVLC Slope Setting for High Frequency Range
MS1402-E-06
- 97 -
2013/02