AK4679EG Datasheet, PDF (26/220 Pages) Asahi Kasei Microsystems – 24bit Stereo CODEC with DSP and MIC/RCV/HP/SPK/LINE-AMP

[AK4679]
Parameter
Symbol
min
typ
max
Unit
PCM Interface Timing (BICKA, SYNCA, SDTIA, SDTOA pins):
SYNCA Timing
Frequency
fs2
8
-
16
kHz
Serial Interface Timing at Short/long Frame Sync
BICKA Frequency
fBCK2
128
-
4096 kHz
BICKA Period
tBCK2
244
-
-
ns
BICKA Pulse Width Low
tBCKL2
100
-
-
ns
Pulse Width High
tBCKH2
100
-
-
ns
SYNCA Edge to BICKA “↓” (Note 56)
tSYB2
40
-
-
ns
SYNCA Edge to BICKA “↑” (Note 57)
tSYB2
40
-
-
ns
BICKA “↓” to SYNCA Edge (Note 56)
tBSY2
40
-
-
ns
BICKA “↑” to SYNCA Edge (Note 57)
tBSY2
40
-
-
ns
SYNCA to SDTOA (MSB) (Except Short Frame) tSYD2
-
-
60
ns
BICKA “↑” to SDTOA (BCKPA bit = “0”)
BICKA “↓” to SDTOA (BCKPA bit = “1”)
tBSD2
-
tBSD2
-
-
60
ns
-
60
ns
SDTIA Hold Time
tSDH2
25
-
-
ns
SDTIA Setup Time
tSDS2
25
-
-
ns
SYNCA Pulse Width Low
tSYL2 0.8 x tBCK2 -
-
ns
Pulse Width High
tSYH2 0.8 x tBCK2 -
-
ns
Serial Interface Timing at MSB justified and I²S
BICKA Frequency
fBCK2
256
-
3072 kHz
BICKA Period
tBCK2
312.5
-
-
ns
BICKA Pulse Width Low
tBCKL2
130
-
-
ns
Pulse Width High
tBCKH2
130
-
-
ns
SYNCA Edge to BICKA “↑”
tSYB2
50
-
-
ns
BICKA “↑” to SYNCA Edge
tBSY2
50
SYNCA to SDTOA (MSB) (Except I²S mode)
tSYD2
-
-
-
ns
-
80
ns
BICKA “↓” to SDTOA
tBSD2
-
-
80
ns
SDTIA Hold Time
tSDH2
50
-
-
ns
SDTIA Setup Time
tSDS2
50
-
-
ns
SYNCA Duty Cycle
dSYC2
45
50
55
%
Note 56. MSBSA, BCKPA bits = “00” or “11”.
Note 57. MSBSA, BCKPA bits = “01” or “10”.
MS1402-E-06
- 26 -
2013/02