AK4679EG Datasheet, PDF (207/220 Pages) Asahi Kasei Microsystems – 24bit Stereo CODEC with DSP and MIC/RCV/HP/SPK/LINE-AMP

[AK4679]
3. EXT Slave Mode
Power Supply
PDNA pin
PMVCM bit
(Addr:00H, D0)
MCKI pin
LRCK pin
BICK pin
(1)
(2) (3)
Example:
Audio I/F Format: MSB justified (ADC and DAC)
Input MCKI frequency: 256fs
Sampling Frequency: 44.1kHz
(1) Power Supply & PDN pin = “L” Æ “H”
(4)
Input
(4)
Input
(2)Addr:00H, Data:00H
Addr:03H, Data:F0H
Addr:04H, Data:00H
Addr:05H, Data:02H
(3) Addr:00H, Data:01H
MCKI, BICK and LRCK input
Figure 151. Clock Set Up Sequence (3)
<Example>
(1) After Power Up, PDNA pin = “L” Æ “H”.
“L” time of 1.5μs or more is needed to reset the AK4679.
(2) Dummy command (Addr:00H, Data:00H) must be executed before control register is set.
DIF1-0, CM1-0 and FS3-0 bits should be set during this period.
(3) Power Up VCOM: PMVCM bit = “0” Æ “1”
VCOM should first be powered up before the other block operates. Rise-up time of the VCOM pin is 1.5ms
(max) when the external capacitance is 1μF.
(4) Normal operation starts after the MCKI, LRCK and BICK are supplied.
MS1402-E-06
- 207 -
2013/02