AK4679EG Datasheet, PDF (123/220 Pages) Asahi Kasei Microsystems – 24bit Stereo CODEC with DSP and MIC/RCV/HP/SPK/LINE-AMP

[AK4679]
MSBSA bit
0
0
1
1
BCKPA bit
0
1
0
1
Data Interface Format
MSB of SDTOA is output by next rising edge (“↑”) of the falling edge (“↓”) of
BICKA after the rising edge (“↑”) of SYNCA. MSB of SDTIA is latched by the
falling edge (“↓”) of the BICKA just after the output timing of SDTOA’s MSB.
MSB of SDTOA is output by next falling edge (“↓”) of the rising edge (“↑”) of
BICKA after the rising edge (“↑”) of SYNCA. MSB of SDTIA is latched by the
rising edge (“↑”) of the BICKA just after the output timing of SDTOA’s MSB.
MSB of SDTOA is output by the 2nd rising edge (“↑”) of BICKA after the rising
edge (“↑”) of SYNCA. MSB of SDTIA is latched by the falling edge (“↓”) of the
BICKA just after the output timing of SDTOA’s MSB.
MSB of SDTOA is output by the 2nd falling edge (“↓”) of BICKA after the rising
edge (“↑”) of SYNCA. MSB of SDTIA is latched by the rising edge (“↑”) of the
BICKA just after the output timing of SDTOA’s MSB.
Table 119. PCM I/F A Format in Mode 0
Figure
Figure 88
Figure 89
Figure 90
Figure 91
MSBSB
bit
0
0
1
1
BCKPB
bit
0
1
0
1
Data Interface Format
Figure
MSB of SDTOB is output by next rising edge (“↑”) of the falling edge (“↓”) of BICKB
after the rising edge (“↑”) of SYNCB. MSB of SDTIB is latched by the falling edge (“↓”)
of the BICKB just after the output timing of SDTOB’s MSB.
MSB of SDTOB is output by next falling edge (“↓”) of the rising edge (“↑”) of BICKB
after the rising edge (“↑”) of SYNCB. MSB of SDTIB is latched by the rising edge (“↑”)
of the BICKB just after the output timing of SDTOB’s MSB.
MSB of SDTOB is output by the 2nd rising edge (“↑”) of BICKB after the rising edge
(“↑”) of SYNCB. MSB of SDTIB is latched by the falling edge (“↓”) of the BICKB just
after the output timing of SDTOB’s MSB.
MSB of SDTOB is output by the 2nd falling edge (“↓”) of BICKB after the rising edge
(“↑”) of SYNCB. MSB of SDTIB is latched by the rising edge (“↑”) of the BICKB just
after the output timing of SDTOB’s MSB.
Table 120. PCM I/F B Format in Mode 0
Figure 96
Figure 97
Figure 98
Figure 99
MSBSA
bit
0
0
1
1
BCKPA
bit
0
1
0
1
Data Interface Format
Figure
MSB of SDTOA is output by the rising edge (“↑”) of SYNCA. MSB of SDTIA is latched by
the falling edge (“↓”) of the BICKA just after the output timing of SDTOA’s MSB.
MSB of SDTOA is output by the rising edge (“↑”) of SYNCA. MSB of SDTIA is latched by
the rising edge (“↑”) of the BICKA just after the output timing of SDTOA’s MSB.
MSB of SDTOA is output by the rising edge (“↑”) of the first BICKA after the rising edge
(“↑”) of SYNCA. MSB of SDTIA is latched by the falling edge (“↓”) of the BICKA just
after the output timing of SDTOA’s MSB.
MSB of SDTOA is output by the falling edge (“↓”) of the first BICKA after the rising edge
(“↑”) of SYNCA. MSB of SDTIA is latched by the rising edge (“↑”) of the BICKA just
after the output timing of SDTOA’s MSB.
Table 121. PCM I/F A Format in Mode 1
Figure 92
Figure 93
Figure 94
Figure 95
MS1402-E-06
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