AK4679EG Datasheet, PDF (94/220 Pages) Asahi Kasei Microsystems – 24bit Stereo CODEC with DSP and MIC/RCV/HP/SPK/LINE-AMP

[AK4679]
Slope Setting
Y1_M
M1G =
X1_M
(Y2_M – Y1_M)
x 16, M2G =
(X2_M – X1_M)
x 16,
M3G = ^{(Y3M – Y2M)} x 16, M4G = ^{(Y4M – Y3M)} x 16,
(X3_M – X2_M)
(X4_M – X3_M)
The results calculated by the equations above should be rounded off to integer. These integers are slope data.
M1G6-0 bits, M2G6-0 bits,
M3G6-0 bits, M4G6-0 bits
Slope Data
00H
0
(default)
01H
1
02H
2
:
:
7EH
126
7FH
127
Table 57. DVLC Slope Setting for Middle Frequency Range
MS1402-E-06
- 94 -
2013/02