AK4679EG Datasheet, PDF (116/220 Pages) Asahi Kasei Microsystems – 24bit Stereo CODEC with DSP and MIC/RCV/HP/SPK/LINE-AMP

[AK4679]
■ Headphone Output (HPL/HPR pins)
The headphone amplifiers are operated by positive and negative power supplied from charge pump circuit. The VEE pin
outputs the negative voltage generated by the internal charge pump circuit from PVDD. This charge pump circuit is
switched between VDD mode and 1/2VDD mode by the output level of the headphone amplifiers.
The headphone amplifier output is single-ended and centered on 0V (VSS1). Therefore, the capacitor for AC-coupling
can be removed. The minimum load resistance is 16Ω. The output power is 20mW (@ 0dBFS, R_L = 16Ω, AVDD=1.8V,
HPG = -4dB) and 25mW (@ 0dBFS, R_L =32Ω, AVDD=1.8V, HPG=0dB).
The output level of headphone-amp can be controlled by HPG5-0 bits. This volume setting is in common for L/R channels
and can attenuate/gain the mixer output from +6dB to –62dB in 2dB steps (Table 106). The HPG value is changed
independently on L/R channels by zero crossing or timeout. Zero crossing timeout period is set by HPTM1-0 bits. When
LOHM bit = “1”, the headphone-amp output to HPL and HPR pins as (L+R) mono signal.
DAC Lch
LOMH bit
HPG5-0 bits
M
I
HPL pin
X
DAC Rch
LOMH bit
M
I
X
Figure 84. Stereo Headphone Output
HPR pin
HPG5-0 bits
GAIN (dB)
HPG5-0 bits
GAIN (dB)
29H
N/A
14H
−30
28H
N/A
13H
−32
27H
N/A
12H
−34
26H
+6
11H
−36
25H
+4
10H
−38
24H
+2
0FH
−40
23H
0
0EH
−42
22H
−2
0DH
−44
21H
−4
0CH
−46
20H
−6
0BH
−48
1FH
−8
0AH
−50
1EH
−10
09H
−52
1DH
−12
08H
−54
1CH
−14
07H
−56
1BH
−16
06H
−58
1AH
−18
05H
−60
19H
−20
04H
−62
18H
−22
03H
MUTE
17H
−24
02H
MUTE
16H
−26
01H
MUTE
15H
−28
00H
MUTE
Table 106. Headphone-Amp Volume Setting (Default: 0dB, N/A: Not available)
MS1402-E-06
- 116 -
2013/02