AK4679EG Datasheet, PDF (100/220 Pages) Asahi Kasei Microsystems – 24bit Stereo CODEC with DSP and MIC/RCV/HP/SPK/LINE-AMP

[AK4679]
2. DRC Recovery Operation
During the DRC recovery operation, when the DRC volume reaches 0dB or the output level of DRC exceeds limiter
detection level, the DRC volume are set automatically with the soft transition in the recovery speed set by DRGAIN1-0
bits (Table 67).
DRGAIN1
bit
0
0
1
1
DRGAIN0
Recovery Speed
bit
8kHz
16kHz
44.1kHz
0
1.1dB/s
2.1dB/s
5.9dB/s
1
2.1dB/s
4.2dB/s 11.7dB/s
0
4.2dB/s
8.5dB/s 23.4dB/s
1
8.5dB/s
17.0dB/s 46.7dB/s
Table 67. DRC Recovery Speed Setting
(default)
MS1402-E-06
- 100 -
2013/02