AK4679EG Datasheet, PDF (88/220 Pages) Asahi Kasei Microsystems – 24bit Stereo CODEC with DSP and MIC/RCV/HP/SPK/LINE-AMP

[AK4679]
2. Dynamic Volume Control Block
The AK4679 has the dynamic volume control (DVLC) circuits before DRC. DVLC divides frequency range into three
band (Low, Middle, High) and controls independently.
(1) Low Frequency Range
LPF
VOLL
DVLCL
“0” data
(DLLPF1-0 bits = “00”)
DLLPF1-0
DLLA13-0
DLLB13-0
VL1X/Y5-0
VL2X/Y5-0
VL3X/Y4-0
L1G6-0
L2G6-0
L3G6-0
L4G6-0
Figure 69. DVLC Functions and Signal Path for Low Frequency Range
(1-1) Low Pass Filter (LPF)
This is composed with 1st or 2nd order LPF. DLLA13-0 bits and DLLB13-0 bits set the coefficient of LPF. DLLPF1-0
bits controls ON/OFF of the LPF. When the LPF is OFF, the audio data does not pass this block. The coefficient must be
set when DLLPF1-0 bits = “00” or PMDRC bit = “0”. The LPF starts operation 4/fs(max) after when DLLPF1-0 bits =
“01” or “10” and PMDRC bit = “1” are set.
DLLPF1 bit DLLPF0 bit
Mode
0
0
OFF (“0” data) (default)
0
1
1st order LPF
1
0
2nd order LPF
1
1
N/A
Table 49. DLLPF Mode Setting (N/A: Not available)
fs: Sampling frequency
fc: Cut-off frequency
Register setting
LPF: DLLA[13:0] bits =A, DLLB[13:0] bits =B
(MSB=DLLA13, DLLB13; LSB=DLLA0, DLLB0)
1
A=
,
1 + 1 / tan (πfc/fs)
1 − 1 / tan (πfc/fs)
B=
1 + 1 / tan (πfc/fs)
Transfer function (1st order)
1 + z ^−1
H(z) = A
1 + Bz ^−1
Transfer function (2nd order)
1 + z ^−1
1 + z ^−1
H(z) = A
xA
1 + Bz ^−1
1 + Bz ^−1
The cut-off frequency should be set as below.
fc/fs ≥ 0.002 (fc min = 88Hz at 44.1kHz)
MS1402-E-06
- 88 -
2013/02