AK4679EG Datasheet, PDF (157/220 Pages) Asahi Kasei Microsystems – 24bit Stereo CODEC with DSP and MIC/RCV/HP/SPK/LINE-AMP

[AK4679]
Addr Register Name
D7
D6
D5
D4
A0H DVLCL LPF Co-efficient 0 DLLA7 DLLA6 DLLA5 DLLA4
A1H DVLCL LPF Co-efficient 1
0
0
DLLA13 DLLA12
A2H DVLCL LPF Co-efficient 2 DLLB7 DLLB6 DLLB5 DLLB4
A3H DVLCL LPF Co-efficient 3
0
0
DLLB13 DLLB12
A4H DVLCM HPF Co-efficient 0 DMHA7 DMHA6 DMHA5 DMHA4
A5H DVLCM HPF Co-efficient 1 0
0
DMHA13 DMHA12
A6H DVLCM HPF Co-efficient 2 DMHB7 DMHB6 DMHB5 DMHB4
A7H DVLCM HPF Co-efficient 3 0
0
DMHB13 DMHB12
A8H DVLCM LPF Co-efficient 0 DMLA7 DMLA6 DMLA5 DMLA4
A9H DVLCM LPF Co-efficient 1
0
0
DMLA13 DMLA12
AAH DVLCM LPF Co-efficient 2 DMLB7 DMLB6 DMLB5 DMLB4
ABH DVLCM LPF Co-efficient 3
0
0
DMLB13 DMLB12
ACH DVLCH HPF Co-efficient 0 DHHA7 DHHA6 DHHA5 DHHA4
ADH DVLCH HPF Co-efficient 1
0
0
DHHA13 DHHA12
AEH DVLCH HPF Co-efficient 2 DHHB7 DHHB6 DHHB5 DHHB4
AFH DVLCH HPF Co-efficient 3
0
0
DHHB13 DHHB12
Note 80. PDNA pin = “L” resets the registers to their default values.
Note 81. The bits defined as 0 must contain a “0” value.
Note 82. For Addresses B0H to FFH, data must not be written.
D3
DLLA3
DLLA11
DLLB3
DLLB11
DMHA3
DMHA11
DMHB3
DMHB11
DMLA3
DMLA11
DMLB3
DMLB11
DHHA3
DHHA11
DHHB3
DHHB11
D2
DLLA2
DLLA10
DLLB2
DLLB10
DMHA2
DMHA10
DMHB2
DMHB10
DMLA2
DMLA10
DMLB2
DMLB10
DHHA2
DHHA10
DHHB2
DHHB10
D1
DLLA1
DLLA9
DLLB1
DLLB9
DMHA1
DMHA9
DMHB1
DMHB9
DMLA1
DMLA9
DMLB1
DMLB9
DHHA1
DHHA9
DHHB1
DHHB9
D0
DLLA0
DLLA8
DLLB0
DLLB8
DMHA0
DMHA8
DMHB0
DMHB8
DMLA0
DMLA8
DMLB0
DMLB8
DHHA0
DHHA8
DHHB0
DHHB8
MS1402-E-06
- 157 -
2013/02