AK4679EG Datasheet, PDF (191/220 Pages) Asahi Kasei Microsystems – 24bit Stereo CODEC with DSP and MIC/RCV/HP/SPK/LINE-AMP

[AK4679]
■ Command Code map for the DSP
1. Command Code
BIT7
R/W flag
BIT6
BIT5
BIT4
Area to be accessed
BIT3
BIT2
BIT1
BIT0
Accompanying data to the access area
R/W Flag
Write at “1”, Read at “0”.
Access data and accompanying data
BIT6 BIT5 BIT4 BIT3~0
0
0
0 Number of Write
0
0
1 Number of Write
0
1
0 0100
0010
1000
0
1
1 0100
0010
1
0
0 Register Address
1
0
1 Register Address
1
1
0 0000
1
1
1 0000
0010
0100
0110
1000
1010
1100
Write preparation to CRAM during RUN
Write preparation to OFREG during RUN
Write operation to CRAM during RUN
Write operation to OFREG during RUN
Write operation to PRAM during DSP reset
Write operation to CRAM during DSP reset
Write operation to OFREG during DSP reset
Internal control registers 00h~08h
System power registers 00h~01h
Device Identification (Read only)
Error Status Read
CRC Write/Read
Write operation of JX code
Read operation from MIR1
Read operation from MIR2
Read operation from MIR3
Read operation from MIR4
2. Address
Address description is always LSB justified. Accessing command code BIT[6:4]= “000” to “011” requires 16bit address.
Accessing command code BIT[6:4]= “100” to “111” requires no address.
3. Data
Length of write data is depending on the writing area size. When accessing RAM, data may be written to sequential
address locations by writing data continuously.
MS1402-E-06
- 191 -
2013/02