AK4679EG Datasheet, PDF (142/220 Pages) Asahi Kasei Microsystems – 24bit Stereo CODEC with DSP and MIC/RCV/HP/SPK/LINE-AMP

DSP Operational Transition Diagram
Power
off
Apply Power
Power
Down
Remove Power
L
PDNE pin
H
Hardware
Reset
0
PWSW bit
1
Hardware
Suspended
MRSTN bit ="0"
0
MRSTN bit
1
Register
Setting
Sleep
(Standby)
DLRDY bit
0 1 _Download
Program
0
DSPRSTN bit = “1”
1
Wait Sync
DSPRSTN bit = “0”
MS1402-E-06
SYDET bit
(Read only)
Sync
Detect
?
N
Y
CG
Ctrl
Stop Sync
CGLK bit
(Read only)
CG
Locked
?
N
Y
DSP
Operational
"Run state"
Figure 118. DSP Block State Diagram
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[AK4679]
2013/02