AK4679EG Datasheet, PDF (14/220 Pages) Asahi Kasei Microsystems – 24bit Stereo CODEC with DSP and MIC/RCV/HP/SPK/LINE-AMP

[AK4679]
ANALOG CHARACTERISTICS (CODEC)
(Ta=25°C; AVDD=PVDD= DVDD=TVDDA= TVDDE=1.8V, SVDD=4.2V, VDDE=1.2V;
VSS1=VSS2=VSS3=VSS4 =VSS5 =0V; Signal Frequency=1kHz; 24bit Data; fs=44.1kHz, BICK=64fs; Measurement
Bandwidth=20Hz ∼ 20kHz; unless otherwise specified)
Parameter
min
typ
max
Unit
MIC Amplifier: LIN1/RIN1/LIN2/RIN2/LIN3/RIN3/LIN4/RIN4 pins
Input Resistance
17
25
38
kΩ
Gain (Note 10)
Gain Setting
−6
-
+24
dB
Step Width
-
3
-
dB
MIC Power Supply: MPWR1, MPWR2 pin
Output Voltage (Note 11)
2.3
2.5
2.7
V
Load Resistance
1.0
-
-
kΩ
Load Capacitance
-
-
30
pF
Output Noise Level (A-weighted)
-
−107
-
dBV
PSRR (Note 12)
217Hz
-
100
-
dB
1kHz
-
100
-
dB
Stereo ADC Analog Input Characteristics:
LIN1/RIN1/LIN2/RIN2/LIN3/RIN3/LIN4/RIN4 pins(Single-ended Input) → Stereo ADC → Programmable Filter
(IVOL=0dB, EQ=ALC=OFF) → SDTO
Resolution
-
-
24
Bits
Input Voltage (Note 13)
(Note 14)
(Note 15)
0.204
1.62
0.227
1.8
0.250
Vpp
1.98
Vpp
S/(N+D) (−1dBFS)
(Note 14)
69
80
(Note 15)
-
80
-
dB
-
dB
D-Range (−60dBFS, A-weighted)
(Note 14)
76
(Note 15)
-
87
92
-
dB
-
dB
S/N (A-weighted)
(Note 14)
76
87
(Note 15)
-
92
-
dB
-
dB
Interchannel Isolation (Note 16)
(Note 14)
75
90
(Note 15)
-
100
-
dB
-
dB
Interchannel Gain Mismatch (Note 16)
(Note 14)
(Note 15)
-
-
0
0
0.8
dB
0.8
dB
Note 10. In case of full-differential input, MGAIN (min)=-3dB
Note 11. In case of MICL1 bit or MICL2 bit = “0”. Output voltage is proportional to AVDD (typ. 1.39 x AVDD V).
MICL1 bit or MICL2 bit = “1”: typ. 1.56 x AVDD V
Note 12. PSRR is referred to SVDD with 500mVpp sine wave.
Note 13. Input voltage which means ADC full-scale voltage is proportional to AVDD voltage.
Single-ended Input: Vin = 1.0 x AVDD Vpp(typ).
Full-Differential Input: Vin = (IN+) – (IN–) = 1.0 x AVDD Vpp(typ).
IN+ = 0.5 x AVDD(typ), IN– = 0.5 x AVDD(typ)
Pseudo-Differential Input: Vin = (IN+) – (IN–) = 1.0 x AVDD Vpp (typ).
IN+ = 1.0 x AVDD(typ), IN– = 0V (IN– pin should be connected to VSS1.)
Note 14. MGNL3-0=MGNR3-0 bits = “BH” (+18dB).
In case of Full-differential, S/(N+D) =75dB, DR=S/N=81dB
Note 15. MGNL3-0=MGNR3-0 bits = “5H” (0dB).
In case of Full-differential, S/(N+D) =79dB, DR=S/N=91dB
Note 16. This is a value between Lch and Rch of each input.
MS1402-E-06
- 14 -
2013/02