AK4679EG Datasheet, PDF (53/220 Pages) Asahi Kasei Microsystems – 24bit Stereo CODEC with DSP and MIC/RCV/HP/SPK/LINE-AMP

[AK4679]
■ EXT Slave Mode (PMPLL bit = “0”, M/S bit = “0”) (Audio I/F)
When PMPLL bit is “0”, the audio I/F becomes EXT mode. Master clock is input from the MCKI pin, the internal PLL
circuit is not operated. This mode is compatible with I/F of the normal audio CODEC. The clocks required to operate the
CODEC are MCKI (256fs, 512fs, or 1024fs), LRCK (fs) and BICK (≥32fs). The master clock (MCKI) should be
synchronized with LRCK. The phase between these clocks does not matter. The input frequency of MCKI is selected by
CM1-0 bits (Table 10) and sampling frequency is selected by FS3-0 bits (Table 11).
In case that the CODEC is used without Audio I/F (like phone call), the CODEC can be operated by MCKI only. In this
case, BICK and LRCK can be stopped.
Mode
0
1
2
3
CM1 bit CM0 bit MCKI Input Frequency Sampling Frequency Range
0
0
256fs
24kHz ∼ 48kHz
0
1
512fs
8kHz ∼ 24kHz
1
0
1024fs
8kHz ∼ 12kHz
1
1
256fs
8kHz ∼ 24kHz
Table 10. MCKI Frequency in EXT Slave Mode (PMPLL bit = “0”, M/S bit = “0”)
(default)
Mode
0
1
2
3
5
7
10
11
15
Others
FS3 bit FS2 bit FS1 bit FS0 bit Sampling Frequency
0
0
0
0
8kHz
0
0
0
1
12kHz
0
0
1
0
16kHz
0
0
1
1
24kHz
0
1
0
1
11.025kHz
0
1
1
1
22.05kHz
1
0
1
0
32kHz
1
0
1
1
48kHz
1
1
1
1
44.1kHz
Others
N/A
Table 11. Setting of Sampling Frequency (N/A: Not available)
(default)
The S/N of the DAC at low sampling frequencies is worse than at high sampling frequencies due to out-of-band noise.
The out-of-band noise can be reduced by using higher frequency of the master clock. The S/N of the DAC output through
LOUT/ROUT pins at fs=8kHz is shown in Table 12.
MCKI
S/N
(fs=8kHz, 20kHzLPF + A-weighted)
256fs
82dB
512fs
82dB
1024fs
92dB
Table 12. Relationship between MCKI and S/N of LOUT/ROUT pins
CODEC
MCKI
BICK
LRCK
SDTO
SDTI
256fs, 512fs, or
1024fs
≥ 32fs
1f s
DSP
BCLKx
SYNCx
SDINx
SDOUTx
Figure 41. EXT Slave Mode (x=1 to 4)
MS1402-E-06
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2013/02