Z80185 Datasheet, PDF (83/95 Pages) Zilog, Inc. – SMART PERIPHERAL CONTROLLERS

Zilog
PRELIMINARY
Z80185/Z80195
SMART PERIPHERAL CONTROLLES
Z80185 PIA AND MISCELLANEOUS REGISTERS (Continued)
RAM And ROM Registers
Three registers, ROMBR, RAMLBR and RAMUBR, and two
pins, /ROMCS and /RAMCS, assist with decoding of ROM
and RAM blocks of memory.
RAMUBR (I/O Address %EA)
765 43210
1 11 1 1 11 1
/ROMCS can be forced to a “1” (inactive state) by setting
bit 5 in the System Configuration Register, to allow the user
to overlay the RAM area over the ROM area.
ROMBR (I/O Address %EC)
765 43210
1 11 1 1 11 1
A19-A12 ROMBR
A19-A12 RAMUBR
Figure 85. ROMBR (I/O Address %EC)
Figure 83. RAMUBR (I/O Address %EA)
RAMLBR (I/O Address %EB)
765 43210
1 111111 1
A19-A12 RAMLBR
Figure 84. RAMLBR (I/O Address %EB)
/RAMCS and /ROMCS are active for accesses by an
external master, as well as by the Z80185 processor. If
/ROMCS and /RAMCS are programmed to overlap,
/ROMCS is asserted and /RAMCS is inactive for addresses
in the overlapping region.
Chip Select signals are active for the address range:
/ROMCS: (ROMBR) >= A19-A12 >=
Size of On-Chip ROM (if enabled, else 0)
The names RAMUBR and RAMLBR stand for RAM Upper
Boundary Range and RAM Lower Boundary Range. These
two registers specify the address range for the /RAMCS
signal. When accessed, memory addresses are less than,
or equal, to the value in the RAMUBR, and greater than, or
equal to, the value programmed in the RAMLBR, /RAMCS
is asserted.
ROMBR ROM Address Boundary Register
/RAMCS: (RAMUBR) >= A19-A12 >= (RAMLBR)
All three of the above registers are set to “FFh” at Power-
On Reset. This means that if on-chip ROM is enabled,
/ROMCS is asserted for all addresses above the size of on-
chip ROM, if not, /ROMCS is asserted for all addresses.
Since /ROMCS takes priority over /RAMCS, the latter will
never be asserted until the value in the ROMBR and
RAMLBR registers are re-initialized to lower values.
This register specifies the address range for the /ROMCS
signal. When an accessed memory address is less than, or
equal to, the value programmed in this register, but greater
than the size of on-chip ROM (if on-chip ROM is enabled),
the /ROMCS signal is asserted.
DS971850301
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