Z80185 Datasheet, PDF (67/95 Pages) Zilog, Inc. – SMART PERIPHERAL CONTROLLERS

Zilog
PRELIMINARY
Z80185/Z80195
SMART PERIPHERAL CONTROLLES
Z80185 BIDIRECTIONAL CENTRONICS P1284 CONTROLLER (Continued)
Because there are five outputs in a Peripheral mode,
another register, called PARC2, allows software to change
the nAck line, rather than the Select line:
1=drive
Busy
High
7
1=drive
PError
High
6
1=drive
nAck
High
5
1=drive
nFault
High
4
1=drive
Busy
Low
3
1=drive
PError
Low
2
1=drive
nAck
Low
1
1=drive
nFault
Low
0
Figure 76. Writing to PARC2 in a Peripheral Mode
(I/O Address %DB)
The Parallel mode register (PARM) includes the basic
mode control of the controller:
NewMode IdleIE
StatIE
DREQIE
Mode
7
6
5
4
3
2
1
0
Figure 77. PARM (I/O Address %D9)
NewMode = 1 reinitializes the state machine to the initial
state for the mode called out by MODE. Never change
MODE without writing a 1 in this bit.
IdleIE = 1 enables interrupts when the controller sets the
Idle flag. When software uses a DMA channel to provide
data to the P1284 controller, it can be expected that the
channel will do so in a timely manner, and thus, that an Idle
condition signifies that the channel has finished transfer-
ring the block. (Software can also enable an interrupt from
the DMA channel, but on the transmit side, such interrupts
are not well-synchronized to events on the P1284 control-
ler.) Conversely, if software provides data, Idle may not be
grounds for an interrupt.
Some modes set the Idle flag when they are entered.
However, such a setting of Idle never requests an interrupt.
StatIE = 1 enables “status” interrupts that are described
separately for each mode.
DREQIE = 1 enables interrupts when the controller sets
DREQ, except that in those modes that set DREQ when
they are entered, such setting doesn’t request an interrupt.
Table 3. Bidirectional Centronics Mode Selection
MODE
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
Non-P1284 mode
Peripheral Compatible/Negotiation mode
Peripheral Nibble mode
Peripheral Byte mode
Peripheral ECP Reverse mode
Peripheral Inactive mode
Peripheral ECP Forward mode with software RLE
handling
Peripheral ECP Forward mode with hardware RLE
expansion
Host Negotiation mode
Host Compatible mode
Host Nibble mode
Host Byte mode
Host ECP Forward mode
Host Reserved mode
Host ECP Reverse mode with software RLE
handling
Host ECP Reverse mode with hardware RLE
expansion
DS971850301
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