Z80185 Datasheet, PDF (51/95 Pages) Zilog, Inc. – SMART PERIPHERAL CONTROLLERS

Zilog
MMU REGISTERS
PRELIMINARY
CBR
Addr 38H
Bit CB7 CB6 CB5 CB4 CB3 CB2 CB1 CB0
Upon Reset
0
0
0
0
0
0
0
0
R/W R/W R/W R/W R/W R/W R/W R/W R/W
Figure 60. MMU Common Base Register
Z80185/Z80195
SMART PERIPHERAL CONTROLLES
MMU Common Base
Register
BBR
Addr 39H
Bit BB7 BB6 BB5 BB4 BB3 BB2 BB1 BB0
Upon Reset
0
0
0
0
0
0
0
0
R/W R/W R/W R/W R/W R/W R/W R/W R/W
Figure 61. MMU Bank Base Register
MMU Bank Base Register
CBAR
Addr 3AH
Bit CA3 CA2 CA1 CA0 BA3 BA2 BA1 BA0
Upon Reset
1
1
1
1
0
0
0
0
R/W R/W R/W R/W R/W R/W R/W R/W R/W
MMU Bank Area Register
MMU Common Area Register
Figure 62. MMU Common/Bank Area Register
DS971850301
51