Z80185 Datasheet, PDF (60/95 Pages) Zilog, Inc. – SMART PERIPHERAL CONTROLLERS

Zilog
PRELIMINARY
Write Register 5
D7 D6 D5 D4 D3 D2 D1 D0
Tx CRC Enable
RTS
/SDLC/CRC-16
Tx Enable
Send Break (Async Mode)
LocalTalk Driven Enable (HDLC Mode)
0 0 Tx 5 Bits(Or Less)/Character
0 1 Tx 7 Bits/Character
1 0 Tx 6 Bits/Character
1 1 Tx 8 Bits/Character
DTR
Z80185/Z80195
SMART PERIPHERAL CONTROLLERS
Write Register 6
D7 D6 D5 D4 D3 D2 D1 D0
Sync7
Sync1
Sync7
Sync3
ADR7
ADR7
Sync6
Sync0
Sync6
Sync2
ADR6
ADR6
Sync5
Sync5
Sync5
Sync1
ADR5
ADR5
Sync4
Sync4
Sync4
Sync0
ADR4
ADR4
Sync3
Sync3
Sync3
1
ADR3
x
Sync2
Sync2
Sync2
1
ADR2
x
Sync1
Sync1
Sync1
1
ADR1
x
Sync0
Sync0
Sync0
1
ADR0
x
Monosync, 8 Bits
Monosync, 6 Bits
Bisync, 16 Bits
Bisync, 12 Bits
SDLC
SDLC (Address Range)
Write Register 7
D7 D6 D5 D4 D3 D2 D1 D0
Sync7 Sync6 Sync5 Sync4
Sync5 Sync4 Sync3 Sync2
Sync15 Sync14 Sync13 Sync12
Sync11 Sync10 Sync9 Sync8
0
1
1
1
Sync3 Sync2 Sync1
Sync1 Sync0 x
Sync11 Sync10 Sync9
Sync7 Sync6 Sync5
1
1
1
Sync0
x
Sync8
Sync4
0
Monosync, 8 Bits
Monosync, 6 Bits
Bisync, 16 Bits
Bisync, 12 Bits
SDLC
Figure 69. Write Register Bit Functions (Continued)
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DS971850301