Z80185 Datasheet, PDF (43/95 Pages) Zilog, Inc. – SMART PERIPHERAL CONTROLLERS

Zilog
TIMER DATA REGISTERS
PRELIMINARY
Z80185/Z80195
SMART PERIPHERAL CONTROLLES
TMDR0L
Read/Write
Addr 0CH
7 6 54 3 21 0
Figure 36. Timer 0 Data Register L
TMDR1L
Read/Write
Addr 14H
7 6 54 3 21 0
Figure 37. Timer 1 Data Register L
TMDR0H
Read/Write
Addr 0DH
15 14 13 12 11 10 9 8
When Read, read Data Register L
before reading Data Register H.
Figure 38. Timer 0 Data Register H
TMDR1H
Read/Write
Addr 15H
15 14 13 12 11 10 9 8
When Read, read Data Register L
before reading Data Register H.
Figure 39. Timer 1 Data Register H
TIMER RELOAD REGISTERS
RLDR0L
Read/Write
Addr 0EH
7 6 54 3 21 0
Figure 40. Timer 0 Reload Register L
RLDR1L
Read/Write
Addr 16H
7 6 54 3 21 0
Figure 41. Timer 1 Reload Register L
RLDR0H
Read/Write
Addr 0FH
15 14 13 12 11 10 9 8
Figure 42. Timer 0 Reload Register H
RLDR1H
Read/Write
Addr 17H
15 14 13 12 11 10 9 8
Figure 43. Timer 1 Reload Register H
DS971850301
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