Z80185 Datasheet, PDF (15/95 Pages) Zilog, Inc. – SMART PERIPHERAL CONTROLLERS

Zilog
PRELIMINARY
AC CHARACTERISTICS (Continued)
General-Purpose I/O Timing Port Timing
Parameters referenced in Figure 15 appear in the following
Tables. Note: Port 2 timing is different, even when Bidirec-
tional Centronics feature is not in active use.
Z80185/Z80195
SMART PERIPHERAL CONTROLLES
I/O Port Timing
(Output)
T1
T2
TW
T3
T1
T2
TW
T3
T1
T2
TW
T3
0
A0-A7
/IORQ
Port Data Dir. Reg. Addr. (Input)
B7
Port Data Reg. Addr. (Input)
B7
Port Data Reg. Addr. (Input)
B7
D0-D7
/WR
(In) 'OO'H (Change Port To
Output)
B6
B3
Port Output Data 1
(In)
B6
B3
Port Output Data 2 (In)
B6
B2
B2
B2
Port
Port (Output)
A1
I/O Port Timing (Input)
A0-A7
Port Data Dir. Reg.
Addr. (Input)
Port Data Reg.
Addr. (Input)
Port Output Data 1 (Out)
A1
A2
Port Data Reg.
/IORQ
D0-D7
/WR
/RD
(In) 'FF'H (Change
Port To Input)
Port Data 1 (Out)
B2
B4
Port Data
2 Out
B2
B4
Port
Previous
Output
Port Input Data
1 (In)
Port Input Data
2 (In)
Figure 15. PORT Timing
DS971850301
15